SearcharxivSearch

arXiv subjects

Yaman Sangar

Publications and source records attributed to Yaman Sangar.

2 recordsLinked to original sources

Magnetic Tunnel Junctions for Timekeeping in Intermittent Computing Systems

Batteryless intermittent systems run unattended for years, but power failures erase timekeeping state, corrupting sensing, scheduling, and coordination. State-of-the-art timekeepers infer elapsed time from capacitor discharge; however, the capacitor must be sized for the longest interval measured (so range, energy, and area grow together), and repeated charge-discharge cycling lowers capacitance over time, biasing every estimate further as the deployment ages. We present FLINT, a timekeeper that reads elapsed time from the stochastic retention loss of an array of "broken" Magnetic Tunnel Junctions (MTJs)---spintronic memory cells engineered to lose state predictably. Because the decay timescale is fixed by device geometry, the energy to read it is independent of the interval measured and does not drift with device age. We validate FLINT's array model against 21 fabricated MTJs, then evaluate the full timekeeper in real-device-trace-driven simulation, showing that it tracks over 15 minutes of off-time within 10% error while consuming only 1.03 $μJ$ and occupying under 0.1 $mm^2$---$9.2\times$ the range at $11\times$ lower energy than prior work. It extends to longer intervals at no added cost, and makes $16-52\times$ fewer scheduling errors than an aging capacitor clock over a one-year deployment.

cs.AR

SpiderCam: Low-Power Snapshot Depth from Differential Defocus

We introduce SpiderCam, an FPGA-based snapshot depth-from-defocus camera which produces 480x400 sparse depth maps in real-time at 32.5 FPS over a working range of 52 cm while consuming 624 mW of power in total. SpiderCam comprises a custom camera that simultaneously captures two differently focused images of the same scene, processed with a SystemVerilog implementation of depth from differential defocus (DfDD) on a low-power FPGA. To achieve state-of-the-art power consumption, we present algorithmic improvements to DfDD that overcome challenges caused by low-power sensors, and design a memory-local implementation for streaming depth computation on a device that is too small to store even a single image pair. We report the first sub-Watt total power measurement for passive FPGA-based 3D cameras in the literature.

cs.CV