Yanan Wang — Page 7

arXiv2013

Twisted Bilayer Graphene Superlattices

Twisted bilayer graphene (tBLG) provides us with a large rotational freedom to explore new physics and novel device applications, but many of its basic properties remain unresolved. Here we report the synthesis and systematic Raman study of tBLG. Chemical vapor deposition was used to synthesize hexagon- shaped tBLG with a rotation angle that can be conveniently determined by relative edge misalignment. Superlattice structures are revealed by the observation of two distinctive Raman features: folded optical phonons and enhanced intensity of the 2D-band. Both signatures are strongly correlated with G-line resonance, rotation angle and laser excitation energy. The frequency of folded phonons decreases with the increase of the rotation angle due to increasing size of the reduced Brillouin zone (rBZ) and the zone folding of transverse optic (TO) phonons to the rBZ of superlattices. The anomalous enhancement of 2D-band intensity is ascribed to the constructive quantum interference between two Raman paths enabled by a near-degenerate Dirac cone. The fabrication and Raman identification of superlattices pave the way for further basic study and new applications of tBLG.

cond-mat.mtrl-sci↗

arXiv2013

MIMS: Towards a Message Interface based Memory System

Memory system is often the main bottleneck in chipmultiprocessor (CMP) systems in terms of latency, bandwidth and efficiency, and recently additionally facing capacity and power problems in an era of big data. A lot of research works have been done to address part of these problems, such as photonics technology for bandwidth, 3D stacking for capacity, and NVM for power as well as many micro-architecture level innovations. Many of them need a modification of current memory architecture, since the decades-old synchronous memory architecture (SDRAM) has become an obstacle to adopt those advances. However, to the best of our knowledge, none of them is able to provide a universal memory interface that is scalable enough to cover all these problems. In this paper, we argue that a message-based interface should be adopted to replace the traditional bus-based interface in memory system. A novel message interface based memory system (MIMS) is proposed. The key innovation of MIMS is that processor and memory system communicate through a universal and flexible message interface. Each message packet could contain multiple memory requests or commands along with various semantic information. The memory system is more intelligent and active by equipping with a local buffer scheduler, which is responsible to process packet, schedule memory requests, and execute specific commands with the help of semantic information. The experimental results by simulator show that, with accurate granularity message, the MIMS would improve performance by 53.21%, while reducing energy delay product (EDP) by 55.90%, the effective bandwidth utilization is improving by 62.42%. Furthermore, combining multiple requests in a packet would reduce link overhead and provide opportunity for address compression.

cs.AR↗