arXiv subjects

Ying Mao

Publications and source records attributed to Ying Mao.

At least 19 recordsLinked to original sources

arXiv2026

A GPU-Accelerated and Geometry-Aware Quantum-Classical Framework for Optimized PES Scans with CUDA-Q

Hybrid quantum-classical workloads, particularly Potential Energy Surface (PES) scans in quantum chemistry using batched VQE and QAOA, involve many structurally similar Hamiltonians differing only in coefficients. Existing warm-start and meta-optimization strategies reuse parameters between instances but still consume fixed quantum-classical resources, ignoring cross-instance structural similarities. We present OptiPESS, a GPU-accelerated runtime system for adaptive resource allocation in hybrid quantum-classical execution. OptiPESS introduces the Locality-Occupancy-Variance (LOV) metric, a lightweight, geometry-aware measure of Hamiltonian similarity, coupled with efficient alignment and Pauli-classification passes. Using LOV, OptiPESS performs distance-aware scheduling of iteration and shot budgets, predicting which instances can be skipped, quick-solved, or fully optimized. Implemented atop CUDA-Q with persistent multi-GPU execution and near-linear scaling, OptiPESS reduces classical and quantum evaluations by up to 78.3\% and wall-time by up to 74.8\% while maintaining baseline accuracy. This demonstrates how lightweight static analysis and adaptive scheduling can transform quantum-classical co-execution from fixed-budget loops into a predictive, resource-aware runtime.

quant-ph↗

arXiv2026

HybridQC: Hardware-Grounded Simulation of Tightly Integrated Hybrid Quantum-Classical Systems

Hybrid quantum-classical performance depends on how quantum processors share classical compute, controllers, memory, and communication links. Circuit simulators and provider measurements expose kernel and job behavior, but leave topology-level questions about controller bottlenecks, quantum capacity, and mixed-workload contention unanswered. We present HybridQC, a discrete-event simulator for configurable hybrid compute units (HCUs). Users specify resource graphs containing classical compute, memory, controllers, quantum annealing (QA) and digital quantum computing (DQC) devices, and links. Jobs become dependent stages for preparation, quantum execution, transfers, reconstruction, and postprocessing. Finite capacities and selectable scheduling policies determine where stages wait and overlap. Service profiles use measurements from D-Wave Advantage 1 and Advantage 2 and IBM Kingston, Marrakesh, and Fez, separating physical quantum-processor occupancy from cloud wall time. Mean absolute percentage errors are 3.92%-8.04% for D-Wave access time and 5.26%-19.01% for IBM quantum seconds. Balanced 10x HCU scaling improves makespan by 2.19x-3.42x, while policy choice changes makespan by 1.80x for a mixed workload with 20 jobs per workload family. Scaling depends on which inputs grow: 100x data growth yields median runtime near 306 s, while 100x joint growth in circuits, shots, and depth reaches 4.806 x 10^7 s on the fixed HCU. HybridQC enables designers to study topology, scheduling, and workload growth before tightly integrated quantum-classical machines exist physically.

cs.PF↗

arXiv2026

FTWeave: Composing Logical Execution, Real-Time Decoding, and Magic-State Supply in Tightly Integrated Quantum-Classical Systems

Fault-tolerant quantum applications depend on both decoded measurement information and a continuing supply of magic states. While an operation waits for either, its logical data require protection that produces more syndrome data and decoding work. Architects must provision the quantum and classical parts of the machine together, before complete systems are available to measure. FTWeave is a system-level simulator for this architectural exploration. It accepts OpenQASM 2/3 circuits, CUDA-Q Logical compiler artifacts, Stim circuits, and provider-derived physical inputs through adapters that preserve operation and measurement dependencies. Users bind these inputs to quantum resources, classical processors, memory, communication, and factory configurations. One event timeline determines application progress, resource ownership, and continuing protection. This supplies the system model needed to connect circuit and decoder evidence to application performance. Controlled demand studies and complete multiplier and Ising circuits show why the coupling changes provisioning decisions. A fixed-work approximation predicts a 3.55x multiplier speedup from additional factories where the coupled model gives almost none. Explicit ownership also changes useful capacity: increasing decoder workers alone has no benefit in a storage-constrained case, while increasing workers and feedback entries together gives 4.93x speedup. Selected color and hypergraph-product code mappings take 53-90% longer under decoder service variability, despite an unchanged mean. These comparisons identify useful resource combinations and distinguish protection work from the elapsed lifetime of quantum data.

quant-ph↗

arXiv2026

Demonstration of Logical Error Suppression in a Surface Code Memory on a Cloud-Accessible IBM Superconducting Processor

Quantum error correction can suppress logical errors exponentially with code distance when physical noise is below threshold. Realizing this on hardware requires tight coordination among quantum gates, mid-circuit measurements, and qubit coherence. Device variation, noise asymmetry, and correlations across space and time complicate the translation of these capabilities into logical error suppression. Here, we study rotated surface-code memory on an IBM Nighthawk r2 processor. Performance varies across tested processor placements, which we attribute to differences in qubit quality. We optimize the code by combining short readout, fused measurement and reset, and an XX echo on data qubits during ancilla readout. Compared with standard readout without reset or echo, the optimized syndrome extraction circuit reduces the median per-round logical error rate by factors of 3.8 in the X basis and 1.4 in the Z basis. In memory experiments of up to 150 rounds, the distance advantage weakens, alongside long-lived correlations that may reflect a persistent error component. Under our optimization recipe, increasing the protected distance from 3 to 6 while holding the other distance fixed reduces the per-round logical error rate from 0.53% to 0.24% in Z memory and from 0.52% to 0.22% in X memory. The corresponding error-suppression factors under maximum-likelihood decoding are 1.68 and 1.85. These results connect circuit compilation and optimization to surface-code memory performance and limitations, and motivate QPU and QEC circuit codesign for fault-tolerant quantum computing primitives on current cloud hardware.

quant-ph↗

arXiv2026

TandemQEC: Joint Provisioning of Streaming Quantum Error Correction in Tightly-Integrated Quantum-Classical Systems

Fault-tolerant quantum applications require timely classical decoding and feedback. Component benchmarks leave open how contention across processors, links, and finite buffers affects application progress. We propose TandemQEC, a system-level simulator connecting applications, code-specific quantum error correction schedules, and physical modalities. It models dependencies, resource availability, and buffer occupancy to explain joint provisioning decisions. We validate TandemQEC using analytical and CUDA-Q Logical references and measured pipelines. Across 960 repeated GPU/CPU runs using CUDA-Q Realtime, median absolute relative errors are 1.06% for median latency and 1.74% for 95th-percentile latency. Separate CPU-window validation covers PyMatching and BP-OSD across five code families. Studies span superconducting, trapped-ion, and neutral-atom modalities. At 32 concurrent jobs, increasing decoder capacity and bandwidth by 8x together achieves a 4.17x speedup, while either upgrade alone reduces runtime by at most 2.1%. 4x faster syndrome extraction even raises runtime under fixedduration protection due to generating more classical work. Joint upgrades recover reference performance. These findings show why component improvements require balanced provisioning to benefit applications. TandemQEC identifies useful resource combinations before complete systems are available.

quant-ph↗

arXiv2026

FTCircuitBench: A Benchmark Suite for Fault-Tolerant Quantum Compilation and Architecture

Realizing large-scale quantum advantage is expected to require quantum error correction (QEC), making the compilation and optimization of logical operations a critical area of research. Logical computation imposes distinct constraints and operational paradigms that differ from those of the Noisy Intermediate-Scale Quantum (NISQ) regime, motivating the continued evolution of compilation tools. Given the complexity of this emerging stack, where factors such as gate decomposition precision and computational models must be co-designed, standardized benchmarks and toolkits are valuable for evaluating progress. To support this need, we introduce FTCircuitBench, which serves as: (1) a benchmark suite of impactful quantum algorithms, featuring pre-compiled instances in both Clifford+T and Pauli Based Computation models; (2) a modular end-to-end pipeline allowing users to compile and decompose algorithms for various fault-tolerant architectures, supporting both prebuilt and custom optimization passes; and (3) a toolkit for evaluating the impact of algorithms and optimization across the full compilation stack, providing detailed numerical analysis at each stage. FTCircuitBench is fully open-sourced and maintained on Github.

quant-ph↗

arXiv2026

FTPrimitiveBench: A Benchmark Suite For Logical Computation Under Hardware-Motivated and Biased Noise Models

Fault-tolerant quantum computing requires understanding how error-correcting codes perform on diverse physical hardware. This is typically assessed via noisy stabilizer simulation of logical circuits at HPC scale, combined with a noise model that yields a logical error rate for the relevant code distances and depths. The uniform depolarizing model is the standard baseline, but its homogeneous assumptions fail to capture the heterogeneity, asymmetries, and correlations of real devices, where Pauli, measurement, and spatio-temporal errors are not weakly coupled. Yet these same structured features create opportunities for joint code-hardware co-design, motivating noise models that more faithfully reflect target hardware while remaining tractable to simulate. We introduce FTPrimitiveBench, a systematic benchmarking approach for studying how logical primitives interact with hardware-motivated noise. It supports both custom specifications and representative structured noise families: Pauli bias, measurement bias, and spatial or spatio-temporal non-uniformity -- together with generators for core surface-code Clifford primitives: logical memory, lattice surgery, transversal logical Hadamard, and the logical phase gate via lattice surgery. We find that structured noise affects these primitives in qualitatively distinct ways, with outcomes shaped by the interplay between noise model, primitive, and decoder choice. These results extend memory benchmarks to active logical computation, where the interaction between noise structure and primitive implementation matters. By standardizing the link between noise-model specification and primitive construction, FTPrimitiveBench enables reproducible comparative studies of QEC protocols and decoders, supporting hardware-aware co-design of fault-tolerant architectures. Code: https://github.com/ShuwenKan/FTPrimitiveBench.

quant-ph↗

arXiv2026

Circuit Folding: Scalable and Graph-Based Circuit Cutting via Modular Structure Exploitation

Circuit cutting is a promising technique that leverages both quantum and classical computational resources, enabling the practical execution of large quantum circuits on noisy intermediate-scale quantum (NISQ) hardware. Recent approaches typically focus exclusively on either gate cuts or wire cuts, modeling quantum circuits as graphs. However, identifying optimal cutting locations using this representation often results in prohibitively high computational complexity, especially under realistic hardware constraints. In this paper, we introduce CIFOLD, a novel graph-based framework that exploits repetitive modular structures inherent in quantum algorithms, significantly enhancing the scalability and efficiency of circuit cutting. Our approach systematically folds quantum circuits into compact meta-graphs by identifying and merging common gate sequences across entangled qubits, dramatically simplifying subsequent partitioning tasks. We define folding factor and variance to quantify circuit compression and ensure balanced folding. Using these condensed representations, CIFOLD precisely identifies cut locations without exhaustive global graph searches. We perform extensive experiments, comparing CIFOLD with state-of-the-art circuit-cutting techniques. Results demonstrate that CIFOLD achieves superior partition quality and computational efficiency, reducing the number of required cuts by an average of 31.6% and lowering the sampling overhead substantially by 3.55*10^9. Our findings illustrate that CIFOLD represents a significant advancement toward scalable quantum circuit cutting.

quant-ph↗

arXiv2026

Towards unified brain-to-text decoding across speech production and perception

Speech production and perception are the main ways humans communicate daily. Prior brain-to-text decoding studies have largely focused on a single modality and alphabetic languages. Here, we present a unified brain-to-sentence decoding framework for both speech production and perception in Mandarin Chinese. The framework exhibits strong generalization ability, enabling sentence-level decoding when trained only on single-character data and supporting characters and syllables unseen during training. In addition, it allows direct and controlled comparison of neural dynamics across modalities. Mandarin speech is decoded by first classifying syllable components in Hanyu Pinyin, namely initials and finals, from neural signals, followed by a post-trained large language model (LLM) that maps sequences of toneless Pinyin syllables to Chinese sentences. To enhance LLM decoding, we designed a three-stage post-training and two-stage inference framework based on a 7-billion-parameter LLM, achieving overall performance that exceeds larger commercial LLMs with hundreds of billions of parameters or more. In addition, several characteristics were observed in Mandarin speech production and perception: speech production involved neural responses across broader cortical regions than auditory perception; channels responsive to both modalities exhibited similar activity patterns, with speech perception showing a temporal delay relative to production; and decoding performance was broadly comparable across hemispheres. Our work not only establishes the feasibility of a unified decoding framework but also provides insights into the neural characteristics of Mandarin speech production and perception. These advances contribute to brain-to-text decoding in logosyllabic languages and pave the way toward neural language decoding systems supporting multiple modalities.

q-bio.NC↗

arXiv2026

PASS: Certified Subset Repair for Classical and Quantum Pairwise Constrained Clustering

Pairwise-constrained clustering incorporates side information through must-link (ML) and cannot-link (CL) relations between samples. While these constraints can improve cluster quality, they complicate optimization at scale and limit quantum and hybrid approaches through the size of the encoded problem. PASS is a scalable framework for pairwise-constrained k-means that concentrates optimization on a small working subset while updating remaining assignments through re-centering. Cannot-link feasibility under subset-restricted updates is formalized as a list-coloring problem on the induced constraint subgraph, yielding a checkable repair certificate with verifiable outcomes. The same subset restriction produces reduced classical subproblems and smaller quantum formulations, enabling a reduction-based hybrid evaluation under a simulation protocol. Infeasible constraint sets are handled explicitly: the pipeline returns a verifiable repair under stated conditions or reports residual conflicts under the same evaluation protocol. Across diverse benchmarks, PASS attains competitive SSE with lower runtime and returns solutions on instances where strong baselines do not finish within a fixed time budget.

cs.LG↗

arXiv2026

Quantum-Audit: Evaluating the Reasoning Limits of LLMs on Quantum Computing

Language models have become practical tools for quantum computing education and research, from summarizing technical papers to explaining theoretical concepts and answering questions about recent developments in the field. While existing benchmarks evaluate quantum code generation and circuit design, their understanding of quantum computing concepts has not been systematically measured. Quantum-Audit addresses this gap with 2,700 questions covering core quantum computing topics. We evaluate 26 models from leading organizations. Our benchmark comprises 1,000 expert-written questions, 1,000 questions extracted from research papers using LLMs and validated by experts, plus an additional 700 questions including 350 open-ended questions and 350 questions with false premises to test whether models can correct erroneous assumptions. Human participants scored between 23% and 86%, with experts averaging 74%. Top-performing models exceeded the expert average, with Claude Opus 4.5 reaching 84% accuracy, though top models showed an average 12-point accuracy drop on expert-written questions compared to LLM-generated ones. Performance declined further on advanced topics, dropping to 73% on security questions. Additionally, models frequently accepted and reinforced false premises embedded in questions instead of identifying them, with accuracy below 66% on these critical reasoning tasks.

cs.CL↗

arXiv2026

Differentiable Architecture Search for Adversarially Robust Quantum Computer Vision

Current quantum neural networks suffer from extreme sensitivity to both adversarial perturbations and hardware noise, creating a significant barrier to real-world deployment. Existing robustness techniques typically sacrifice clean accuracy or require prohibitive computational resources. We propose a hybrid quantum-classical Differentiable Quantum Architecture Search (DQAS) framework that addresses these limitations by jointly optimizing circuit structure and robustness through gradient-based methods. Our approach enhances traditional DQAS with a lightweight Classical Noise Layer applied before quantum processing, enabling simultaneous optimization of gate selection and noise parameters. This design preserves the quantum circuit's integrity while introducing trainable perturbations that enhance robustness without compromising standard performance. Experimental validation on MNIST, FashionMNIST, and CIFAR datasets shows consistent improvements in both clean and adversarial accuracy compared to existing quantum architecture search methods. Under various attack scenarios, including Fast Gradient Sign Method (FGSM), Projected Gradient Descent (PGD), Basic Iterative Method (BIM), and Momentum Iterative Method (MIM), and under realistic quantum noise conditions, our hybrid framework maintains superior performance. Testing on actual quantum hardware confirms the practical viability of discovered architectures. These results demonstrate that strategic classical preprocessing combined with differentiable quantum architecture optimization can significantly enhance quantum neural network robustness while maintaining computational efficiency.

quant-ph↗

arXiv2026

Calibration-Conditioned FiLM Decoders for Low-Latency Decoding of Quantum Error Correction Evaluated on IBM Repetition-Code Experiments

Real-time decoding of quantum error correction (QEC) is essential for enabling fault-tolerant quantum computation. A practical decoder must operate with high accuracy at low latency, while remaining robust to spatial and temporal variations in hardware noise. We introduce a hardware-conditioned neural decoder framework designed to exploit the natural separation of timescales in superconducting processors, where calibration drifts occur over hours while error correction requires microsecond-scale responses. By processing calibration data through a graph-based encoder and conditioning a lightweight convolutional backbone via feature-wise linear modulation (FiLM), we decouple the heavy processing of device statistics from the low-latency syndrome decoding. We evaluate this approach using the 1D repetition code as a testbed on IBM Fez, Kingston, and Pittsburgh processors, collecting over 2.7 million experimental shots spanning distances up to d = 11. We demonstrate that a single trained model generalizes to unseen qubit chains and new calibration data acquired days later without retraining. On these unseen experiments, the FiLM-conditioned decoder achieves up to an 11.1x reduction in logical error rate relative to modified minimum-weight perfect matching. We observe that by employing a network architecture that exploits the highly asynchronous nature of system calibration and decoding, hardware-conditioned neural decoding demonstrates promising, adaptive performance with negligible latency overhead relative to unconditioned baselines.

quant-ph↗

arXiv2025

Hardware-aware and Resource-efficient Circuit Packing and Scheduling on Trapped-Ion Quantum Computers

The rapid expansion of quantum cloud services has led to long job queues due to single-tenant execution models that underutilize hardware resources. Quantum multi-programming (QMP) mitigates this by executing multiple circuits in parallel on a single device, but existing methods target superconducting systems with limited connectivity, high crosstalk, and lower gate fidelity. Trapped-ion architectures, with all-to-all connectivity, long coherence times, and high-fidelity mid-circuit measurement properties, presents itself as a more suitable platform for scalable QMP. We present CircPack, a hardware-aware circuit packing framework designed for modular trapped-ion devices based on the Quantum Charge-Coupled Device (QCCD) architecture. CircPack formulates static circuit scheduling as a two-dimensional packing problem with hardware-specific shuttling constraints. Compared to superconducting-based QMP approaches, CircPack achieves up to 70.72% better fidelity, 62.67% higher utilization, and 32.80% improved layer reduction. This framework is also capable of scalable, balanced scheduling across a cluster of independent QCCD modules, highlighting trapped-ion systems' potential in improving the throughput of quantum cloud computing in the near future.

quant-ph↗

arXiv2025

qc-kmeans: A Quantum Compressive K-Means Algorithm for NISQ Devices

Clustering on NISQ hardware is constrained by data loading and limited qubits. We present \textbf{qc-kmeans}, a hybrid compressive $k$-means that summarizes a dataset with a constant-size Fourier-feature sketch and selects centroids by solving small per-group QUBOs with shallow QAOA circuits. The QFF sketch estimator is unbiased with mean-squared error $O(\varepsilon^2)$ for $B,S=Θ(\varepsilon^{-2})$, and the peak-qubit requirement $q_{\text{peak}}=\max\{D,\lceil \log_2 B\rceil + 1\}$ does not scale with the number of samples. A refinement step with elitist retention ensures non-increasing surrogate cost. In Qiskit Aer simulations (depth $p{=}1$), the method ran with $\le 9$ qubits on low-dimensional synthetic benchmarks and achieved competitive sum-of-squared errors relative to quantum baselines; runtimes are not directly comparable. On nine real datasets (up to $4.3\times 10^5$ points), the pipeline maintained constant peak-qubit usage in simulation. Under IBM noise models, accuracy was similar to the idealized setting. Overall, qc-kmeans offers a NISQ-oriented formulation with shallow, bounded-width circuits and competitive clustering quality in simulation.

quant-ph↗

arXiv2025

QIBONN: A Quantum-Inspired Bilevel Optimizer for Neural Networks on Tabular Classification

Hyperparameter optimization (HPO) for neural networks on tabular data is critical to a wide range of applications, yet it remains challenging due to large, non-convex search spaces and the cost of exhaustive tuning. We introduce the Quantum-Inspired Bilevel Optimizer for Neural Networks (QIBONN), a bilevel framework that encodes feature selection, architectural hyperparameters, and regularization in a unified qubit-based representation. By combining deterministic quantum-inspired rotations with stochastic qubit mutations guided by a global attractor, QIBONN balances exploration and exploitation under a fixed evaluation budget. We conduct systematic experiments under single-qubit bit-flip noise (0.1\%--1\%) emulated by an IBM-Q backend. Results on 13 real-world datasets indicate that QIBONN is competitive with established methods, including classical tree-based methods and both classical/quantum-inspired HPO algorithms under the same tuning budget.

cs.LG↗

arXiv2025

Resource Management Schemes for Cloud-Native Platforms with Computing Containers of Docker and Kubernetes

Businesses have made increasing adoption and incorporation of cloud technology into internal processes in the last decade. The cloud-based deployment provides on-demand availability without active management. More recently, the concept of cloud-native application has been proposed and represents an invaluable step toward helping organizations develop software faster and update it more frequently to achieve dramatic business outcomes. Cloud-native is an approach to build and run applications that exploit the cloud computing delivery model's advantages. It is more about how applications are created and deployed than where. The container-based virtualization technology, such as Docker and Kubernetes, serves as the foundation for cloud-native applications. This paper investigates the performance of two popular computational-intensive applications, big data, and deep learning, in a cloud-native environment. We analyze the system overhead and resource usage for these applications. Through extensive experiments, we show that the completion time reduces by up to 79.4% by changing the default setting and increases by up to 96.7% due to different resource management schemes on two platforms. Additionally, the resource release is delayed by up to 116.7% across different systems. Our work can guide developers, administrators, and researchers to better design and deploy their applications by selecting and configuring a hosting platform.

cs.DC↗

arXiv2025

Optimizing Inter-chip Coupler Link Placement for Modular and Chiplet Quantum Systems

Quantum computing offers unparalleled computational capabilities but faces significant challenges, including limited qubit counts, diverse hardware topologies, and dynamic noise and error rates, which hinder scalability and reliability. Distributed quantum computing, particularly chip-to-chip connections, has emerged as a solution by interconnecting multiple processors to collaboratively execute large circuits. While hardware advancements, such as IBM's Quantum Flamingo, focus on improving inter-chip fidelity, limited research addresses efficient circuit cutting and qubit mapping in distributed systems. This project introduces InterPlace, a self-adaptive, hardware-aware framework for chip-to-chip distributed quantum systems. InterPlace analyzes qubit noise and error rates to construct a virtual system topology, guiding circuit partitioning and distributed qubit mapping to minimize SWAP overhead and enhance fidelity. Implemented with IBM Qiskit and compared with the state-of-the-art, InterPlace achieves up to a 53.0\% improvement in fidelity and reduces the combination of on-chip SWAPs and inter-chip operations by as much as 33.3\%, demonstrating scalability and effectiveness in extensive evaluations on real quantum hardware topologies.

quant-ph↗