arXiv subjects

Yinghao Ho

Publications and source records attributed to Yinghao Ho.

6 recordsLinked to original sources

arXiv2026

Instantaneous-Frame Theory of Strongly Driven Parametric Gates

Parametric two-qubit gates using tunable couplers are a promising approach to scalable superconducting quantum processors. However, conventional theories formulated in the idle eigenbasis break down in the large-amplitude regime required for fast gate operations. Here, we show that parametric gates are more naturally and accurately described as coherent rotations between instantaneous eigenstates rather than idle eigenstates. This approach may appear counterintuitive, since instantaneous eigenbases are usually associated with adiabatic dynamics. However, they also form a natural moving frame for driven dynamics, where the non-Abelian Berry connection governs transitions and provides a compact description of the exchange and effective $ZZ$ couplings. We show that this theory achieves quantitative agreement with exact numerical simulations across representative tunable-coupler architectures, including double-transmon, capacitively shunted double-transmon, and single-transmon couplers. The description remains accurate even in regimes where idle-frame descriptions fail, while substantially reducing the reliance on computationally demanding exact simulations. These results establish an instantaneous-frame theory of parametric gates beyond conventional idle-frame models and provide a new perspective on driven quantum dynamics.

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arXiv2026

Parametrically Driven iSWAP Gate Using a Capacitively Shunted Double-Transmon Coupler at the Zero-Flux Sweet Spot

A double-transmon coupler (DTC) enables a fast, high-fidelity CZ gate between two highly detuned, fixed-frequency transmon qubits. Moreover, a recently proposed capacitively shunted DTC (CSDTC) realizes a small residual ZZ interaction over a wide flux-bias range around zero flux, eliminating the necessity of static flux biasing while maintaining high CZ-gate fidelity. However, CZ gates with the DTC and CSDTC require baseband flux pulses with large amplitudes, which are vulnerable to pulse distortion and decoherence due to large qubit-coupler hybridization. To address these issues, we experimentally demonstrate a parametrically driven iSWAP gate operated at zero flux bias between highly detuned, fixed-frequency transmon qubits coupled through a CSDTC. Using a simple flux-drive waveform without predistortion, we realize an average gate fidelity of 99.92(2)% at a total gate time of 112 ns. The observed high-fidelity performance is consistent with small qubit-coupler hybridization and small effective ZZ interaction during the gate. Our numerical simulations reproduce the experimentally observed iSWAP interaction rate and effective ZZ interaction, demonstrating the applicability of the theoretical model not only to spectral information but also to time-domain dynamics such as gate operations. These results boost further progress in the research of superconducting quantum computers.

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arXiv2025

Capacitively Shunted Double-Transmon Coupler Realizing Bias-Free Idling and High-Fidelity CZ Gate

A high-fidelity CZ gate utilizing a double-transmon coupler (DTC) has recently been demonstrated as a building block for superconducting quantum processors. Like many other kinds of tunable couplers, however, the DTC requires a finite DC current for flux-biasing the coupler at the idling point to turn off the coupling, necessitating extra care for wiring and heat-load management. To address this issue, we theoretically propose and experimentally realize a novel coupling scheme by introducing a shunt capacitance between the two transmons of the DTC at zero-flux bias, which demonstrates high-fidelity CZ-gate performance comparable to the previous DTC. Through a comprehensive error budget analysis using multiple randomized benchmarking methods, we also identify that the current fidelity is limited by the decoherence through the coupler. Moreover, we experimentally demonstrate the wide operational flux range of the capacitively shunted DTC, which solves the challenging issue of remnant flux existing even with careful magnetic shielding.

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arXiv2024

Realization of High-Fidelity CZ Gate based on a Double-Transmon Coupler

Striving for higher gate fidelity is crucial not only for enhancing existing noisy intermediate-scale quantum (NISQ) devices but also for unleashing the potential of fault-tolerant quantum computation through quantum error correction. A recently proposed theoretical scheme, the double-transmon coupler (DTC), aims to achieve both suppressed residual interaction and a fast high-fidelity two-qubit gate simultaneously, particularly for highly detuned qubits. Harnessing the state-of-the-art fabrication techniques and a model-free pulse-optimization process based on reinforcement learning, we translate the theoretical DTC scheme into reality, attaining fidelities of 99.90% for a CZ gate and 99.98% for single-qubit gates. The performance of the DTC scheme demonstrates its potential as a competitive building block for superconducting quantum processors.

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arXiv2024

High-performance multiqubit system with double-transmon couplers: Toward scalable superconducting quantum computers

Tunable couplers in superconducting quantum computers have enabled fast and accurate two-qubit gates, with reported high fidelities over 99% in various architectures and gate implementation schemes. However, there are few tunable couplers whose performance in multi-qubit systems is clarified, except for the most widely used one: single-transmon coupler (STC). Achieving similar accuracy to isolated two-qubit systems remains challenging due to various undesirable couplings but is necessary for scalability. In this work, we numerically analyze a system of three fixed-frequency qubits coupled via two double-transmon couplers (DTCs) where nearest-neighbor qubits are highly detuned and also next nearest-neighbor ones are nearly resonant. The DTC is a recently proposed tunable coupler, which consists of two fixed-frequency transmons coupled through a common loop with an additional Josephson junction. We find that the DTC can not only reduce undesired residual couplings sufficiently, as well as in isolated two-qubits systems, but also enables implementations of 30-ns CZ gates and individual and simultaneous 10-ns $\pi/2$ pulses with fidelities over 99.99%. For comparison, we also investigate the system where the DTCs are replaced by the STCs. The results show that the DTC outperforms the STC in terms of both residual coupling suppression and gate accuracy in the above systems. From these results, we expect that the DTC architecture is promising for realizing high-performance, scalable superconducting quantum computers.

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arXiv2023

Measurement-free fault-tolerant logical zero-state encoding of the distance-three nine-qubit surface code in a one-dimensional qubit array

Generation of logical zero states encoded with a quantum error-correcting code is the first step for fault-tolerant quantum computation, but requires considerably large resource overheads in general. To reduce such overheads, we propose an efficient encoding method for the distance-three, nine-qubit surface code and show its fault tolerance. This method needs no measurement, unlike other fault-tolerant encoding methods. Moreover, this is applicable to a one-dimensional qubit array. Observing these facts, we experimentally demonstrate the logical zero-state encoding of the surface code using a superconducting quantum computer on the cloud. We also experimentally demonstrate the suppression of fast dephasing due to intrinsic residual interactions in this machine by a dynamical decoupling technique dedicated for the qubit array. To extend this method to larger codes, we also investigate the concatenation of the surface code with itself, resulting in a distance-nine, 81-qubit code. We numerically show that fault-tolerant encoding of this large code can be achieved by appropriate error detection. Thus, the proposed encoding method will provide a new way to low-overhead fault-tolerant quantum computation.

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