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Yu-Hsin Kuo

Publications and source records attributed to Yu-Hsin Kuo.

4 recordsLinked to original sources

Thermal Processing Limits in Oxide-Channel Ferroelectric Field Effect Transistors

In this work, we report a systematic study of the impact of high-temperature post-capping thermal annealing on the memory characteristics of Oxide-semiconductor channel ferroelectric field-effect transistors (OS-FeFETs). Using an identical engineered ferroelectric gate stack 8nm Hf0.5Zr0.5O2 (HZO) / 3 nm Al2O3 / 8 nm HZO (8/3/8) and a hybrid capping layer (3 nm HfO2 + 3 nm Al2O3), 10 percent Ga doped InO (IGO) channel and 4 percent W doped InO (IWO) channel FeFETs remain functional after annealing at temperatures up to 650 C for durations of up to 30 min and 10 min, respectively; further annealing results in irreversible loss of conduction and device failure. Detailed electrical analysis reveals that the MW enhancement originates from a preferential positive shift in the erased-state threshold voltage, while the programmed-state threshold voltage remains comparatively stable. Grazing-incidence X-ray diffraction measurements further indicate structural evolution in the IWO and IGO oxide channels with increasing annealing temperature, supporting the observed electrical trends.

cond-mat.mtrl-sci

Engineering Wake-Up-Free Ferroelectric Capacitors with Enhanced High-Temperature Reliability

We systematically explore the design space of ferroelectric hafnium-zirconium oxide (H0.5Z0.5O or HZO) heterostructures for reliable high temperature operation. HZO films are deposited using thermal and plasma-enhanced atomic layer deposition (Th-ALD and PE-ALD) on tungsten (W) and titanium nitride (TiN) bottom electrodes (BE), while maintaining identical top electrodes. We demonstrate that PE-ALD HZO capacitors integrated with W BE exhibit wake-up-free switching up to 125C, along with significantly improved endurance compared to Th-ALD HZO/W devices across a wide temperature range (85-125C). By decoupling the contributions of the plasma-deposited HZO film and the oxidized bottom interface inherently formed during PE-ALD, we identify the oxidized W interfacial layer (WOx) as the primary factor governing endurance enhancement and wake-up suppression at elevated temperatures, while the PE-ALD HZO film provides secondary benefits in reducing wake-up. In contrast, PE-ALD HZO capacitors fabricated on TiN BE show no substantial improvement in wake-up behavior or endurance relative to Th-ALD HZO/TiN devices, despite the formation of an unintentional TiOxNy interfacial layer, and instead exhibit degraded polarization. This difference arises from the significantly weaker endurance enhancement and no wake-up suppression provided by oxidized TiN compared to oxidized W under comparable oxidation conditions. Overall, PE-ALD HZO films enable superior ferroelectric performance at elevated temperatures only when deposited on W BE, while Th-ALD HZO films remain a viable option for high temperature operation on TiN BE. These findings clarify the interplay between deposition technique, electrode chemistry, and interfacial oxidation, and provide design guidelines for integrating ferroelectric memories into monolithic 3D systems under stringent thermal constraints.

cond-mat.mtrl-sci

ALD-Derived WO3-x Leads to Nearly Wake-Up-Free Ferroelectric Hf0.5Zr0.5O2 at Elevated Temperatures

Breaking the memory wall in advanced computing architectures will require complex 3D integration of emerging memory materials such as ferroelectrics-either within the back-end-of-line (BEOL) of CMOS front-end processes or through advanced 3D packaging technologies. Achieving this integration demands that memory materials exhibit high thermal resilience, with the capability to operate reliably at elevated temperatures such as 125C, due to the substantial heat generated by front-end transistors. However, silicon-compatible HfO2-based ferroelectrics tend to exhibit antiferroelectric-like behavior in this temperature range, accompanied by a more pronounced wake-up effect, posing significant challenges to their thermal reliability. Here, we report that by introducing a thin tungsten oxide (WO3-x) layer-known as an oxygen reservoir-and carefully tuning its oxygen content, ultra-thin Hf0.5Zr0.5O2 (5 nm) films can be made robust against the ferroelectric-to-antiferroelectric transition at elevated temperatures. This approach not only minimizes polarization loss in the pristine state but also effectively suppresses the wake-up effect, reducing the required wake-up cycles from 105 to only 10 at 125C- a qualifying temperature for back-end memory integrated with front-end logic, as defined by the JEDEC standard. First-principles density functional theory calculations reveal that WO3 enhances the stability of the ferroelectric orthorhombic phase at elevated temperatures by increasing the tetragonal-to-orthorhombic phase energy gap, and promoting favorable phonon mode evolution, thereby supporting o-phase formation under both thermodynamic and kinetic constraints.

cond-mat.mtrl-sci

DiSH Simulator: Capturing Dynamics of Cellular Signaling with Heterogeneous Knowledge

We present DiSH-Sim, a simulator for large discrete models of biological signal transduction pathways, capable of simulating networks with multi-valued elements in both deterministic and stochastic manner. We focus on order of update and thus incorporate information about timing, taking into account that biological processes are not synchronized and certain biochemical changes occur slower than others. Another feature of our simulator is the use of grouped rules to model multi-valued elements and delays. The DiSH-Sim is publicly available and is being used to validate discrete cancer microenvironment and infectious disease models. It is also incorporated within a large architecture that includes natural language processing tools that read biological literature to assemble logical models. This paper demonstrates the functionalities and ease of use of DiSH-Sim, making it a very useful tool for discrete modeling.

q-bio.MN