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Yun Jeong Yang

Publications and source records attributed to Yun Jeong Yang.

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A note on input signal generators: A relaxation of Willems' fundamental lemma in the SISO case

We provide a practical relaxation of Willems' fundamental lemma for discrete-time linear time-invariant (single-input-single-output) systems. Instead of maintaining conventional Willems' persistency of excitation condition in the behavioral theory, we reformulate the problem in terms of signal generators, hence going back to the dynamical systems theory. We discuss the relationship between the persistency of excitation order and the dimension of the signal generator. Furthermore, we identify a necessary and sufficient condition on the signal generator that can generate informative input--output data for almost all systems and initial conditions. This formulation accommodates both a broad range of conventional persistently exciting input designs and a class of shorter inputs that violate Willems' condition, including sinusoidal sequences with fewer frequencies. Finally, the signal generator perspective allows a natural extension to continuous-time systems.

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