arXiv subjects
Publications and source records attributed to Yves Audet.
This paper presents a novel monitor circuit architecture and experiments performed for detection of extra combinational delays in a high frequency SRAM-Based FPGA on delay sensitive nodes due to transient ionizing radiation.
This paper presents a novel circuit level model that explains and confirms the extra combinational delays in a SRAM-FPGA (Virtex-5) due to radiation, which matches the experimental results by proton irradiation at TRIUMF.
Experimental means to characterize delay faults induced by bit flips and SEUs in I/O blocks of SRAM-based FPGAs are proposed. A delay fault up to 6.2ns sensitized by an events chain is reported.