arXiv subjects

Zhi-Fei Li

Publications and source records attributed to Zhi-Fei Li.

6 recordsLinked to original sources

arXiv2026

Overcoming the Speed-Fidelity Trade-off in Fast CZ Gates via Cyclic Control

High-fidelity quantum gates are essential for scalable quantum computation. However, at short durations, short-timescale waveform distortions break the time-reflection symmetry of control pulses, preventing the precise closure of cyclic evolution. This mechanism renders conventional symmetric protocols intrinsically over-constrained. Conventional strategies typically rely on smoothing the pulse envelopes or embedding the interaction pulse within a longer qubit pulse to bypass short-timescale distortions, which inevitably leads to a persistent speed-fidelity trade-off. To overcome this limitation, we introduce a cyclic control strategy based on parameter-space expansion, which restores controllability by incorporating an additional degree of freedom. We experimentally demonstrate this approach in a superconducting controlled-Z gate, achieving robust suppression of coherent errors without increasing gate duration, reducing the average coherent error from 0.27% to 0.12% across multiple two-qubit gates, as validated by cross-entropy benchmarking. Our results establish a general route to fast, high-fidelity cyclic quantum gates beyond the conventional speed-fidelity trade-off.

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arXiv2026

Single-Step Phase-Engineered Pulse for Active Readout Cavity Reset in Superconducting Circuits

In a circuit QED architecture, we experimentally demonstrate a hardware-efficient and qubit-state-dependent Single-Step Phase-Engineered (SSPE) pulse scheme for actively depopulating a readout cavity. The protocol appends a reset segment with tailored amplitude and phase to a standard square readout pulse. Within the linear-response regime, the optimal reset amplitude scales proportionally with the readout amplitude, while the optimal reset phase remains invariant, significantly simplifying the experimental calibration procedure. Time-resolved measurements of the cavity photon number dynamics demonstrate that the SSPE scheme significantly outperforms the CLEAR protocol in terms of reset speed. Crucially, this approach enables arbitrarily fast, overshoot-free depletion of the cavity photon population, with the ultimate reset rate constrained by the finite analog bandwidth of the measurement chain. Furthermore, a comprehensive evaluation of the QND nature demonstrates that the SSPE scheme introduces no additional non-QND measurement errors. It exhibits non-QNDness comparable to both the free-decay and CLEAR protocols, with residual errors predominantly governed by state switching induced by qubit relaxation during the readout process. Thses results establish the SSPE scheme as a practical and scalable approach for achieving rapid and smooth cavity reset in superconducting quantum circuits.

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arXiv2025

Inverse designed Hamiltonians for perfect state transfer and remote entanglement generation, and applications in superconducting qubits

Hamiltonian inverse engineering enables the design of protocols for specific quantum evolutions or target state preparation. Perfect state transfer (PST) and remote entanglement generation are notable examples, as they serve as key primitives in quantum information processing. However, Hamiltonians obtained through conventional methods often lack robustness against noise. Assisted by inverse engineering, we begin with a noise-resilient energy spectrum and construct a class of Hamiltonians, referred to as the dome model, that significantly improves the system's robustness against noise, as confirmed by numerical simulations. This model introduces a tunable parameter $m$ that modifies the energy-level spacing and gives rise to a well-structured Hamiltonian. It reduces to the conventional PST model at $m=0$ and simplifies to a SWAP model involving only two end qubits in the large-$m$ regime. To address the challenge of scalability, we propose a cascaded strategy that divides long-distance PST into multiple consecutive PST steps. Our work is particularly suited for demonstration on superconducting qubits with tunable couplers, which enable rapid and flexible Hamiltonian engineering, thereby advancing the experimental potential of robust and scalable quantum information processing.

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arXiv2025

Remote entanglement generation via enhanced quantum state transfer

Achieving robust and scalable remote quantum entanglement is a fundamental challenge for the development of distributed quantum networks and modular quantum computing systems. Along this, perfect state transfer (PST) and fractional state transfer (FST) have emerged as promising schemes for quantum state transfer and remote entanglement generation using only nearest-neighbor couplings. However, the current implementations suffer from quantum loss and limited parameter tunability. In this work, we propose a new quantum state transfer scheme based on a zig-zag configuration, which introduces a controlling parameter for PST and FST. We show that this new parameter can suppress the population in the intermediate qubits, thereby reducing losses. We experimentally demonstrate the dynamics of different configurations on a superconducting quantum processor, achieving an $18\%$ reduction in error for remote Bell state generation in a 1D ($1\times5$) qubit chain, and exhibit robustness against certain types of noise. Then we extend our approach to a 2D network, successfully generating a W state among the four corner qubits. These results highlight the potential of our enhanced quantum state transfer scheme for scalable and noise-resilient quantum communication and computing.

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arXiv2025

Demonstrating Coherent Quantum Routers for Bucket-Brigade Quantum Random Access Memory on a Superconducting Processor

Quantum routers (QRouters) are essential components of bucket-brigade quantum random access memory (QRAM), enabling quantum applications such as Grover's search and quantum machine learning. Despite significant theoretical advances, achieving scalable and coherent QRouters experimentally remains challenging. Here, we demonstrate coherent quantum routers using a superconducting quantum processor, laying a practical foundation for scalable QRAM systems. The quantum router at the core of our implementation utilizes the transition composite gate (TCG) scheme, wherein auxiliary energy levels temporarily mediate conditional interactions, substantially reducing circuit depth compared to traditional gate decompositions. Moreover, by encoding routing addresses in the non-adjacent qutrit states $|0\rangle$ and $|2\rangle$, our design inherently enables eraser-detection capability, providing efficient post-selection to mitigate routing errors. Experimentally, we achieve individual QRouter fidelities up to 95.74%, and validate scalability through a two-layer quantum routing network achieving an average fidelity of 82.40%. Our results represent a significant advancement in quantum routing technology, providing enhanced fidelity, built-in error resilience, and practical scalability crucial for the development of future QRAM and large-scale quantum computing architectures.

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arXiv2025

Realizing Scalable Conditional Operations through Auxiliary Energy Levels

In the noisy intermediate-scale quantum (NISQ) era, flexible quantum operations are essential for advancing large-scale quantum computing, as they enable shorter circuits that mitigate decoherence and reduce gate errors. However, the complex control of quantum interactions poses significant experimental challenges that limit scalability. Here, we propose a transition composite gate scheme based on transition pathway engineering, which digitally implements conditional operations with reduced complexity by leveraging auxiliary energy levels. Experimentally, we demonstrate the controlled-unitary (CU) family and its applications. In entangled state preparation, our CU gate reduces the circuit depth for three-qubit Greenberger-Horne-Zeilinger (GHZ) and W states by approximately 40-44% compared to circuits using only CZ gates, leading to fidelity improvements of 1.5% and 4.2%, respectively. Furthermore, with a 72% reduction in circuit depth, we successfully implement a quantum comparator-a fundamental building block for quantum algorithms requiring conditional logic, which has remained experimentally challenging due to its inherent circuit complexity. These results demonstrate the scalability and practicality of our scheme, laying a solid foundation for the implementation of large-scale quantum algorithms in future quantum processors.

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