arXiv · 0810.4723
The TRB for HADES and FAIR experiments at GSI
Abstract
The TRB hardware module is a multi-purpose Trigger and Readout Board with on-board DAQ functionality developed for the upgrade of the HADES experiment. It contains a single computer chip (Etrax) running Linux as a well as a 100 Mbit/s Ethernet interface. It has been orginally designed to work as a 128-channel Time to Digital Converter based on the HPTDC chip from CERN. The new version contains a 2 Gbit/s optical link and an interface connector (15 Gbit/s) in order to realize an add-on card concept which makes the hardware very flexible. Moreover, an FPGA chip (Xilinx, Virtex 4 LX 40) and a TigerSharc DSP provide new computing resources which can be used to run on-line analysis algorithms. The TRB is proposed as a prototype for new modules for the planned detector systems PANDA and CBM at the future FAIR facility at GSI-Darmstadt.
Explore related subjects
Keep this discovery
W. Krzemien, I. Frohlich, M. Kajetanowicz, K. Korcyl, J. Michel, M. Palka, P. Salabura, C. Schrader, P. Skott, H. Strobele, J. Stroth, A. Tarantola, M. Traxler, R. Trebacz. 2008-11-06. The TRB for HADES and FAIR experiments at GSI. https://arxiv.org/abs/0810.4723
Cite the original work for its findings. Save a collection to share your selection of sources.