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arXiv · 1806.08939

FPGA Implementation of RDMA-Based Data Acquisition System Over 100 GbE

Wassim Mansour·Nicolas Janvier·Pablo Fajardo
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Abstract

This paper presents an RDMA over Ethernet protocol used for data acquisition systems, currently under development at the ESRF. The protocol is implemented on Xilinx Ultrascale + FPGAs thanks to the 100G hard MAC IP. The proposed protocol is fairly compared with the well-known RoCE-V2 protocol using a commercial network adapter from Mellanox. Obtained results show the superiority of the proposed algorithm over RoCE-V2 in terms of data throughput. Performance tests on the 100G link show that it can reach a maximum stable link performance of 90 Gbps with minimum packets sizes greater than 1KB and 95Gbps for packet sizes greater than 32KB.

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Wassim Mansour, Nicolas Janvier, Pablo Fajardo. 2018-06-23. FPGA Implementation of RDMA-Based Data Acquisition System Over 100 GbE. https://doi.org/10.1109/tns.2019.2904118

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