Static and Dynamic Oxide-Trapped-Charge-Induced Variability in Nanoscale CMOS Circuits

Gennady Zebrev

doi:10.1109/ted.2019.2907816

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arXiv · 1902.04974

Static and Dynamic Oxide-Trapped-Charge-Induced Variability in Nanoscale CMOS Circuits

Gennady Zebrev

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Abstract

The inter-device mismatch and intra-device temporal instability in the nanoscale CMOS circuits is examined from a unified point of view as a static and dynamic parts of the variability con-cerned with stochastic oxide charge trapping and de-trapping. This approach has been benchmarked on the recent evidence of the radiation-induced increase of inter-transistor mismatch in 60 nm ICs. A possible reliability limitation in ultrascale circuits concerned with the single or a few charged defect instability is pointed out and estimated.

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Gennady Zebrev. 2019-02-13. Static and Dynamic Oxide-Trapped-Charge-Induced Variability in Nanoscale CMOS Circuits. https://doi.org/10.1109/ted.2019.2907816

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