A Memory Window Expression to Predict the Scaling Trends and Endurance of FeFETs

Abstract

The commercialization of non-volatile memories based on ferroelectric transistors (FeFETs) has remained elusive due to scaling, retention, and endurance issues. Thus, it is important to develop accurate characterization tools to quantify the scaling and reliability limits of FeFETs. In this work, we propose to exploit an analytical expression for the Memory Window (MW, i.e., the difference between the threshold voltages due to polarization switching) as a tool to: i) identify a universal scaling behavior of MW regardless of the ferroelectric material; ii) predict endurance and explain its weak dependence on writing conditions; iii) give an alternative explanation for MW being lower than theoretical limits; and, based on this, iv) devise strategies to maximize MW for a given ferroelectric thickness. According to these findings, the characterization and analysis of MW would enable the systematic comparison of next-generation FeFET based on emerging ferroelectric materials.