Layer-by-Layer Epitaxy of Multilayer MoS2 Wafers

Abstract

Two-dimensional (2D) semiconductor of MoS2 has great potential for advanced electronics technologies beyond silicon1-9. So far, high-quality monolayer MoS2 wafers10-12 are already available and various demonstrations from individual transistors to integrated circuits have also been shown13-15. In addition to the monolayer, multilayers have narrower band gaps but improved carrier mobilities and current capacities over the monolayer5,16-18. However, achieving high-quality multilayer MoS2 wafers remains a challenge. Here we report the growth of high quality multilayer MoS2 4-inch wafers via the layer-by-layer epitaxy process. The epitaxy leads to well-defined stacking orders between adjacent epitaxial layers and offers a delicate control of layer numbers up to 6. Systematic evaluations on the atomic structures and electronic properties were carried out for achieved wafers with different layer numbers. Significant improvements on device performances were found in thicker-layer field effect transistors (FETs), as expected. For example, the average field-effect mobility ({\mu}FE) at room temperature (RT) can increase from ~80 cm2V-1s-1 for monolayer to ~110/145 cm2V-1s-1 for bilayer/trilayer devices. The highest RT {\mu}FE=234.7 cm2V-1s-1 and a record-high on-current densities of 1.704 mA{\mu}m-1 at Vds=2 V were also achieved in trilayer MoS2 FETs with a high on/off ratio exceeding 107. Our work hence moves a step closer to practical applications of 2D MoS2 in electronics.