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arXiv · 2304.01913

Plated-Through-Hole Via Design Specifications for 112G Serial Links

Michael J. Degerstrom·Chad M. Smutzer·Richard B. Ericson·Clifton R Haider·Barry K. Gilbert
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Abstract

An earlier study of a high layer-count test board using plated-through-hole (PTH) vias and a limited quantity of laser vias was shown to be capable of supporting 112 Gb/s PAM-4 links (or equivalent signaling having 28 GHz (Nyquist) bandwidth). This original board design was then rebuilt using a different fabricator, and the test results revealed a significant decrease in the bandwidth of the vias. These results led to the development of a set of design specifications that PCB vendors can easily validate, which will ensure that the use of high layer-count boards with PTH technology are viable for emerging 112 Gb/s PAM-4 links.

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Michael J. Degerstrom, Chad M. Smutzer, Richard B. Ericson, Clifton R Haider, Barry K. Gilbert. 2023-01-17. Plated-Through-Hole Via Design Specifications for 112G Serial Links. https://arxiv.org/abs/2304.01913

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