Hardware-Assisted Parameterized Circuit Execution

Abhi D. Rajagopala; Akel Hashim; Neelay Fruitwala; Gang Huang; Yilun Xu; Jordan Hines; Irfan Siddiqi; Katherine Klymko; Kasra Nowrouzi

arXiv · 2409.03725

Hardware-Assisted Parameterized Circuit Execution

Abhi D. Rajagopala·Akel Hashim·Neelay Fruitwala·Gang Huang·Yilun Xu·Jordan Hines·Irfan Siddiqi·Katherine Klymko·Kasra Nowrouzi

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Abstract

Standard compilers for quantum circuits decompose arbitrary single-qubit gates into a sequence of physical X(pi/2) pulses and virtual-Z phase gates. Consequently, many circuit classes implement different logic operations but have an equivalent structure of physical pulses that only differ by changes in virtual phases. When many structurally-equivalent circuits need to be measured, generating sequences for each circuit is unnecessary and cumbersome, since compiling and loading sequences onto classical control hardware is a primary bottleneck in quantum circuit execution. In this work, we develop a hardware-assisted protocol for executing parameterized circuits on our FPGA-based control hardware, QubiC. This protocol relies on a hardware-software co-design technique in which software identifies structural equivalency in circuits and "peels" off the relevant parameterized angles to reduce the overall waveform compilation time. The hardware architecture then performs real-time "stitching" of the parameters in the circuit to measure circuits that implement a different overall logical operation. This work demonstrates significant speed ups in the total execution time for several different classes of quantum circuits.

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Abhi D. Rajagopala, Akel Hashim, Neelay Fruitwala, Gang Huang, Yilun Xu, Jordan Hines, Irfan Siddiqi, Katherine Klymko, Kasra Nowrouzi. 2024-09-05. Hardware-Assisted Parameterized Circuit Execution. https://arxiv.org/abs/2409.03725

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