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Akel Hashim

Publications and source records attributed to Akel Hashim.

At least 19 recordsLinked to original sources

A Qutrit Time Crystal Stabilized with Native Chiral Interactions

Periodically driven quantum many-body systems can spontaneously break discrete time-translation symmetry, realizing discrete time crystals. To date, both experimental and theoretical efforts have largely focused on the simplest case of spontaneous period-doubling in $\mathbb{Z}_2$ discrete time crystals realized with qubits. This owes, in part, to the challenge of stabilizing eigenstate order in higher discrete symmetry ($\mathbb{Z}_n$) time crystals, due to the presence of richer domain wall physics. Here, we demonstrate the realization of a $\mathbb{Z}_3$ discrete time crystal by implementing a Floquet chiral clock model in a chain of 15 superconducting qutrits. Unlike the conventional Ising setting, our system features a tunable chiral angle that governs domain-wall dynamics, spectral degeneracies, and crucially, the stability of time-crystalline order. Using disordered nearest-neighbor chiral interactions, we observe robust subharmonic period tripling that persists across a wide range of drive strengths and is independent of initial state. Finally, we highlight the special role that chirality plays in our $\mathbb{Z}_3$ discrete time crystal -- in its absence, the system's Floquet dynamics exhibit a marked initial state dependence governed by domain wall degeneracies. Our results establish native qudit hardware as a powerful platform to access a broader landscape of non-equilibrium phases.

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Understanding Quantum Instruments

The quantum instrument (QI) formalism is required to model mid-circuit measurements (MCMs) and the dependence of the post-measurement state on the measurement outcome. Correctly modeling QIs is essential for applications using MCMs, such as adaptive circuits and quantum error correction. Although QIs yield a joint quantum-classical state after measurement, errors in QIs can still be represented by a $d^2 \times d^2$ superoperator (e.g., process or transfer matrix) for each outcome, just as superoperators describe Markovian errors on unitary gates. However, because the joint quantum-classical system has a distinct error model for each outcome, this complicates the usual interpretation of process- or transfer-matrix error models. This Note offers practical guidance on understanding and interpreting QI error models.

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Time-series based quantum state discrimination

Accurate quantum state readout is crucial for error correction and algorithms, but measurement errors are detrimental. Readout fidelity is typically limited by a poor signal-to-noise ratio (SNR) and energy relaxation ($T_1$ decay), a significant problem for superconducting qubits. While most approaches classify results using clustering algorithms on integrated readout signals, these methods cannot distinguish a qubit that was initially in the ground state from one that decayed to it during measurement. We instead propose using machine learning (ML) on the raw, non-integrated analog signal. We apply time-series classification models, such as a long short-term memory (LSTM) network, to the full data trajectory. We find that our LSTM model, combined with filtering and feature engineering, consistently outperforms clustering. The largest improvements come from reclassifying points in the boundary regions between clusters. These points correspond to atypical measurement records, likely due to transient or noisy features lost during data integration. By retaining temporal information, sequence-aware models like LSTMs can better discriminate these trajectories, whereas clustering methods based on integrated values are more prone to misclassification.

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Easier randomizing gates provide more accurate fidelity estimation

Accurate benchmarking of quantum gates is crucial for understanding and enhancing the performance of quantum hardware. A standard method for this is interleaved benchmarking, a technique which estimates the error on an interleaved target gate by comparing cumulative error rates of randomized sequences implemented with the interleaved gate and without it. In this work, we show both numerically and experimentally that the standard approach of interleaved randomized benchmarking (IRB), which uses the multi-qubit Clifford group for randomization, can produce highly inaccurate and even physically impossible estimates for the error on the interleaved gate in the presence of coherent errors. Fortunately we also show that interleaved benchmarking performed with cycle benchmarking, which randomizes with single qubit Pauli gates, provides dramatically reduced systematic uncertainty relative to standard IRB, and further provides as host of additional benefits including data reusability. We support our conclusions with a theoretical framework for bounding systematic errors, extensive numerical results comparing a range of interleaved protocols under fixed resource costs, and experimental demonstrations on three quantum computing platforms.

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Enhancing quantum noise characterization via extra energy levels

Noise is a major challenge for building practical quantum computing systems. Precise characterization of quantum noise is crucial for developing effective error mitigation and correction schemes. However, state preparation and measurement (SPAM) errors on many current platforms can introduce large ambiguity into conventional noise characterization methods. In this work, we propose a scheme for enhancing quantum noise characterization using additional energy levels. We first develop a comprehensive theory on the identifiability of n-qudit SPAM noise given high-quality single-qudit control, showing the existence of gauge freedoms which can be completely described using subsystem depolarizing maps. We then show how to use these extra energy levels to reduce the gauge ambiguity in characterizing both SPAM and gate noise in the qubit subspace. We experimentally implement these ideas on a superconducting quantum computing device and demonstrate a qutrit-enabled enhancement in noise characterization precision.

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Advances in Josephson Junction Materials and Processes Toward Practical Quantum Computing

The Josephson junction is the fundamental nonlinear building block of superconducting quantum technologies. Its macroscopic quantum tunneling physics underpins superconducting quantum computing, sensing, and communication, but scaling these platforms to utility-scale architectures places increasingly stringent demands on junction materials, interfaces, and fabrication. In quantum computing, these demands include high reproducibility, low dissipation, tunability, compact device footprint, and resilience to noise and defects. This review surveys how advances in materials science, device characterization, and nanofabrication are addressing these challenges and redefining the figures of merit for next-generation Josephson junctions. We also examine the evolution of fabrication strategies, from conventional multi-angle evaporation to foundry-compatible superconducting processes and the integration of emerging junction materials. Progress along these directions will determine how rapidly Josephson junctions move from laboratory-scale components to the foundation of industrial-scale quantum processors.

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Heisenberg-limited calibration of entangling gates with robust phase estimation

The calibration of high-quality two-qubit entangling gates is an essential component in engineering large-scale, fault-tolerant quantum computers. However, many standard calibration techniques are based on randomized circuits that are only quadratically sensitive to calibration errors. As a result, these approaches are inefficient, requiring many experimental shots to achieve acceptable performance. In this work, we demonstrate that robust phase estimation can enable high-precision, Heisenberg-limited estimates of coherent errors in multi-qubit gates. Equipped with an efficient estimator, the calibration problem may be reduced to a simple optimization loop that minimizes the estimated coherent error. We experimentally demonstrate our calibration protocols by improving the operation of a two-qubit controlled-Z gate on a superconducting processor, and we validate the improved performance with gate set tomography. Our methods are applicable to gates in other quantum hardware platforms such as ion traps and neutral atoms, and on other multi-qubit gates, such as CNOT or iSWAP.

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AC/DC: Automated Compilation for Dynamic Circuits

Dynamic quantum circuits incorporate mid-circuit measurements and feed-forward operations originally intended to realize Quantum Error Correction. This paradigm has recently been utilized to prepare certain states and long-range entangling gates as well as reduce resource overhead in quantum algorithms such as Quantum Fourier Transformation and Quantum Phase Estimation. In this paper, we present a novel framework for generating dynamic quantum circuits that automatically prepare any state or unitary operator. This procedure is powered by numerical optimization-based circuit synthesis methods. The first contribution is introducing optimization objective functions incorporating mid-circuit measurement and feed-forward operations. The second contribution is incorporating these into a popular open-source quantum circuit synthesis framework. We demonstrate the generation of dynamic circuits for state preparation, long-range entangling gates, circuit optimization, and the application of dynamic circuits to lattice simulations. The resulting circuits are validated through simulation and execution on quantum hardware. Furthermore, we perform noise analysis to explore the impact of different error ratios in mid-circuit measurements and gate errors, identifying scenarios where dynamic circuits offer the most significant benefits. The dynamic circuits generated by our framework show substantial improvements in reducing circuit depth and, in some cases, the number of gates required. To our knowledge, this is the first practical procedure to generate dynamic quantum circuits. Our objective functions are independent of the underlying synthesis framework and can be easily reused. This framework opens new possibilities for circuit generation and optimization methods, highlighting the potential of dynamic circuits to enhance the performance of quantum algorithms on near-term quantum computers.

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Quantum Benchmarking of High-Fidelity Noise-Biased Operations on a Detuned-Kerr-Cat Qubit

Ubiquitous noises in quantum systems remain a key obstacle to building quantum computers, necessitating the use of quantum error correction codes. Recently, error-correcting codes tailored for noise-biased systems have been shown to offer high fault-tolerance thresholds and reduced hardware overhead, positioning noise-biased qubits as promising candidates for building universal quantum computers. However, quantum operations on these platforms remain challenging, and their noise structures have not yet been rigorously benchmarked to the same extent as those of conventional quantum hardware. In this work, we develop a comprehensive quantum control toolbox for a scalable noise-biased qubit, detuned Kerr-cat qubit, including initialization, universal single-qubit gates and quantum non-demolition readout. We systematically characterize the noise structure of these operations using gate set tomography and dihedral randomized benchmarking, achieving high local gate fidelities, with $\mathcal{F}[Z(\pi/2)]=99.2\%$ and $\mathcal{F}[X(\pi/2)]=92.5\%$. Notably, the noise bias of the detuned Kerr-cat qubit approaches 250, which outperforms its resonant-Kerr-cat qubit counterparts as reported previously, representing a new state-of-the-art performance benchmark for noise-biased qubits. Moreover, our results reveal a critical overestimation of operational noise bias inferred from bit-flip and phase-flip times alone, highlighting the necessity of a precise and direct benchmarking for noise-biased qubit operations. Our work thus establishes a framework for systematically characterizing and validating the performance of quantum operations in structured-noise architectures, which lays the groundwork for implementing efficient quantum error correction in next-generation architectures.

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Hardware-Assisted Parameterized Circuit Execution

Standard compilers for quantum circuits decompose arbitrary single-qubit gates into a sequence of physical X(pi/2) pulses and virtual-Z phase gates. Consequently, many circuit classes implement different logic operations but have an equivalent structure of physical pulses that only differ by changes in virtual phases. When many structurally-equivalent circuits need to be measured, generating sequences for each circuit is unnecessary and cumbersome, since compiling and loading sequences onto classical control hardware is a primary bottleneck in quantum circuit execution. In this work, we develop a hardware-assisted protocol for executing parameterized circuits on our FPGA-based control hardware, QubiC. This protocol relies on a hardware-software co-design technique in which software identifies structural equivalency in circuits and "peels" off the relevant parameterized angles to reduce the overall waveform compilation time. The hardware architecture then performs real-time "stitching" of the parameters in the circuit to measure circuits that implement a different overall logical operation. This work demonstrates significant speed ups in the total execution time for several different classes of quantum circuits.

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A Practical Introduction to Benchmarking and Characterization of Quantum Computers

Rapid progress in quantum technology has transformed quantum computing and quantum information science from theoretical possibilities into tangible engineering challenges. Breakthroughs in quantum algorithms, quantum simulations, and quantum error correction are bringing useful quantum computation closer to fruition. These remarkable achievements have been facilitated by advances in quantum characterization, verification, and validation (QCVV). QCVV methods and protocols enable scientists and engineers to scrutinize, understand, and enhance the performance of quantum information-processing devices. In this tutorial, we review the fundamental principles underpinning QCVV, and introduce a diverse array of QCVV tools used by quantum researchers. We define and explain QCVV's core models and concepts -- quantum states, measurements, and processes -- and illustrate how these building blocks are leveraged to examine a target system or operation. We survey and introduce protocols ranging from simple qubit characterization to advanced benchmarking methods. Along the way, we provide illustrated examples and detailed descriptions of the protocols, highlight the advantages and disadvantages of each, and discuss their potential scalability to future large-scale quantum computers. This tutorial serves as a guidebook for researchers unfamiliar with the benchmarking and characterization of quantum computers, and also as a detailed reference for experienced practitioners.

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ML-Powered FPGA-based Real-Time Quantum State Discrimination Enabling Mid-circuit Measurements

Accurate and timely quantum state discrimination is critical for quantum computing, particularly in protocols requiring mid-circuit measurement (MCM) and conditional feed-forward. While classical state readout in transistors is near-instantaneous, identifying the state of superconducting qubits remains latency-limited and error-prone. Existing approaches rely on post-processing measurement data transferred to host computers, introducing delays on the order of milliseconds -- vastly exceeding the coherence time of quantum states, which typically last only hundreds of microseconds. To bridge this latency gap, we present an in-situ machine learning (ML) inference engine implemented on a field-programmable gate array (FPGA), enabling real-time quantum state discrimination within 40 ns. Our system supports both two-level (qubit) and three-level (qutrit) systems and performs inference directly on digitized readout signals without host-side intervention. This low-latency operation facilitates mid-circuit measurements, where qubit states are measured and reused within a single quantum circuit, and enables real-time conditional operations essential for quantum error correction. Crucially, fast and accurate mid-circuit readout is a prerequisite for implementing practical fault-tolerant error correction, where errors must be detected and corrected within a single circuit cycle to preserve logical state coherence. We validate our system using superconducting transmon devices, demonstrating robust discrimination fidelity across multiple qubit and qutrit channels. Further, we implement a conditional qutrit logic protocol based on FPGA-resident state classification, highlighting the practical benefits of our approach for NISQ-era quantum algorithms and scalable fault-tolerant architectures.

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Hardware-Efficient Randomized Compiling

Randomized compiling (RC) is an efficient method for tailoring arbitrary Markovian errors into stochastic Pauli channels. However, the standard procedure for implementing the protocol in software comes with a large experimental overhead -- namely, it scales linearly in the number of desired randomizations, each of which must be generated and measured independently. In this work, we introduce a hardware-efficient algorithm for performing RC on a cycle-by-cycle basis on the lowest level of our FPGA-based control hardware during the execution of a circuit. Importantly, this algorithm performs a different randomization per shot with zero runtime overhead beyond measuring a circuit without RC. We implement our algorithm using the QubiC control hardware, where we demonstrate significant reduction in the overall runtime of circuits implemented with RC, as well as a significantly lower variance in measured observables.

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Distributed Architecture for FPGA-based Superconducting Qubit Control

Quantum circuits utilizing real time feedback techniques (such as active reset and mid-circuit measurement) are a powerful tool for NISQ-era quantum computing. Such techniques are crucial for implementing error correction protocols, and can reduce the resource requirements of certain quantum algorithms. Realizing these capabilities requires flexible, low-latency classical control. We have developed a custom FPGA-based processor architecture for QubiC, an open source platform for superconducting qubit control. Our architecture is distributed in nature, and consists of a bank of lightweight cores, each configured to control a small (1-3) number of signal generator channels. Each core is capable of executing parameterized control and readout pulses, as well as performing arbitrary control flow based on mid-circuit measurement results. We have also developed a modular compiler stack and domain-specific intermediate representation for programming the processor. Our representation allows users to specify circuits using both gate and pulse-level abstractions, and includes high-level control flow constructs (e.g. if-else blocks and loops). The compiler stack is designed to integrate with quantum software tools and programming languages, such as TrueQ, pyGSTi, and OpenQASM3. In this work, we will detail the design of both the processor and compiler stack, and demonstrate its capabilities with a quantum state teleportation experiment using transmon qubits at the LBNL Advanced Quantum Testbed.

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Efficient Generation of Multi-partite Entanglement between Non-local Superconducting Qubits using Classical Feedback

Quantum entanglement is one of the primary features which distinguishes quantum computers from classical computers. In gate-based quantum computing, the creation of entangled states or the distribution of entanglement across a quantum processor often requires circuit depths which grow with the number of entangled qubits. However, in teleportation-based quantum computing, one can deterministically generate entangled states with a circuit depth that is constant in the number of qubits, provided that one has access to an entangled resource state, the ability to perform mid-circuit measurements, and can rapidly transmit classical information. In this work, aided by fast classical field programmable gate array-based control hardware with a feedback latency of only 150 ns, we explore the utility of teleportation-based protocols for generating non-local, multi-partite entanglement between superconducting qubits. First, we demonstrate well-known protocols for generating Greenberger-Horne-Zeilinger (GHZ) states and non-local CNOT gates in constant depth. Next, we utilize both protocols for implementing a quantum fan-out gate in constant depth among three non-local qubits (i.e., controlled-NOT-NOT). Finally, we demonstrate deterministic state teleportation and entanglement swapping between qubits on opposite sides of our quantum processor. Throughout this work, we find that the fidelity of our teleportation-based protocols is limited by measurement-induced dephasing on idling spectator qubits. Therefore, our work serves as a useful study of the current benefits and limitations of teleportation-based protocols on contemporary superconducting quantum processors.

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Average circuit eigenvalue sampling on NISQ devices

Average circuit eigenvalue sampling (ACES) was introduced by Flammia in arXiv:2108.05803 as a protocol to characterize the Pauli error channels of individual gates across the device simultaneously. The original paper posed using ACES to characterize near-term devices as an open problem. This work advances in this direction by presenting a full implementation of ACES for real devices and deploying it to Superstaq arXiv:2309.05157, along with a device-tailored resource estimation obtained through simulations and experiments. Our simulations show that ACES is able to estimate one- and two-qubit non-uniform Pauli error channels to an average eigenvalue absolute error of under $0.003$ and total variation distance of under 0.001 between simulated and reconstructed probability distributions over Pauli errors with $10^5$ shots per circuit using 5 circuits of depth 14. The question of estimating general error channels through twirling techniques in real devices remains open, as it is dependent on a device's native gates, but simulations with the Clifford set show results in agreement with reported hardware data. Experimental results on IBM's Algiers and Osaka devices are presented, where we characterize their error channels as Pauli channels without twirling.

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Empowering high-dimensional quantum computing by traversing the dual bosonic ladder

High-dimensional quantum information processing has emerged as a promising avenue to transcend hardware limitations and advance the frontiers of quantum technologies. Harnessing the untapped potential of the so-called qudits necessitates the development of quantum protocols beyond the established qubit methodologies. Here, we present a robust, hardware-efficient, and extensible approach for operating multidimensional solid-state systems using Raman-assisted two-photon interactions. To demonstrate its efficacy, we construct a set of multi-qubit operations, realize highly entangled multidimensional states including atomic squeezed states and Schr\"odinger cat states, and implement programmable entanglement distribution along a qudit array. Our work illuminates the quantum electrodynamics of strongly driven multi-qudit systems and provides the experimental foundation for the future development of high-dimensional quantum applications.

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Quasi-Probabilistic Readout Correction of Mid-Circuit Measurements for Adaptive Feedback via Measurement Randomized Compiling

Quantum measurements are a fundamental component of quantum computing. However, on modern-day quantum computers, measurements can be more error prone than quantum gates, and are susceptible to non-unital errors as well as non-local correlations due to measurement crosstalk. While readout errors can be mitigated in post-processing, it is inefficient in the number of qubits due to a combinatorially-large number of possible states that need to be characterized. In this work, we show that measurement errors can be tailored into a simple stochastic error model using randomized compiling, enabling the efficient mitigation of readout errors via quasi-probability distributions reconstructed from the measurement of a single preparation state in an exponentially large confusion matrix. We demonstrate the scalability and power of this approach by correcting readout errors without matrix inversion on a large number of different preparation states applied to a register of eight superconducting transmon qubits. Moreover, we show that this method can be extended to mid-circuit measurements used for active feedback via quasi-probabilistic error cancellation, and demonstrate the correction of measurement errors on an ancilla qubit used to detect and actively correct bit-flip errors on an entangled memory qubit. Our approach enables the correction of readout errors on large numbers of qubits, and offers a strategy for correcting readout errors in adaptive circuits in which the results of mid-circuit measurements are used to perform conditional operations on non-local qubits in real time.

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