Low Power 16-channel Wave Union TDC in a Radiation Tolerant FPGA

Brian A. Bryce; Kathryn M. Marcotte

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arXiv · 2412.05160

Low Power 16-channel Wave Union TDC in a Radiation Tolerant FPGA

Brian A. Bryce·Kathryn M. Marcotte

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Abstract

The design and performance of wave union TDC implemented in a Lattice CertusPro-NX FPGA is discussed. This FPGA is available for radiation tolerant applications. The TDC is implemented with 16-channels and a 200 MHz reference clock. Each channel is able to record at an event rate of > 1 MHz. The performance of the TDC is assessed over voltage and temperature. Typical TDC performance has a resolution of 10.9 ps. Typical INL is +/-3 LSB peak-to-peak. Typical DNL is (+1.13,-0.77) LSB. Typical differential performance between two channels is 20 ps (1-sigma).

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Brian A. Bryce, Kathryn M. Marcotte. 2024-12-06. Low Power 16-channel Wave Union TDC in a Radiation Tolerant FPGA. https://arxiv.org/abs/2412.05160

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