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arXiv · 2608.21231

Pattern Multiplication Underestimates the Sidelobe Level of a Planar Slotted-Waveguide Array by 1.1 to 2.8 dB Across a 2% Band

William Khalili Jr
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Abstract

The standard shortcut in slotted-waveguide array design -- solve one radiating stick, multiply its embedded pattern by the array factor of the intended aperture distribution, and accept the product as the array pattern -- is tested against a full-wave solution of the same metal. For a 16x16-slot planar array in WR-90 synthesised to a -30 dB Taylor illumination, the shortcut underestimates the transverse-plane sidelobe level by 1.06 dB at the design frequency and by 2.22 and 2.84 dB at the edges of a 2% band: a spread of 1.78 dB, larger than the mid-band error itself. Every sidelobe figure carries +/-0.11 dB of mesh spread from a convergence study on the production geometry. The error is signed, is worst at the band edges where the design has least margin, and falls only from 1.58 dB to 1.06 dB when the aperture is doubled from eight sticks to sixteen, which identifies the edge elements as its source. The array was made analysable by a thirteen-point single-slot full-wave calibration: over the design's offset range the handbook closed form for resonant length moves 3.9 micrometres where the measurement moves 143.9 micrometres, and Stevenson's conductance is shown to overestimate by a nearly constant 5.16%.

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William Khalili Jr. 2026-08-21. Pattern Multiplication Underestimates the Sidelobe Level of a Planar Slotted-Waveguide Array by 1.1 to 2.8 dB Across a 2% Band. https://arxiv.org/abs/2608.21231

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