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William Khalili Jr

Publications and source records attributed to William Khalili Jr.

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Pattern Multiplication Underestimates the Sidelobe Level of a Planar Slotted-Waveguide Array by 1.1 to 2.8 dB Across a 2% Band

The standard shortcut in slotted-waveguide array design -- solve one radiating stick, multiply its embedded pattern by the array factor of the intended aperture distribution, and accept the product as the array pattern -- is tested against a full-wave solution of the same metal. For a 16x16-slot planar array in WR-90 synthesised to a -30 dB Taylor illumination, the shortcut underestimates the transverse-plane sidelobe level by 1.06 dB at the design frequency and by 2.22 and 2.84 dB at the edges of a 2% band: a spread of 1.78 dB, larger than the mid-band error itself. Every sidelobe figure carries +/-0.11 dB of mesh spread from a convergence study on the production geometry. The error is signed, is worst at the band edges where the design has least margin, and falls only from 1.58 dB to 1.06 dB when the aperture is doubled from eight sticks to sixteen, which identifies the edge elements as its source. The array was made analysable by a thirteen-point single-slot full-wave calibration: over the design's offset range the handbook closed form for resonant length moves 3.9 micrometres where the measurement moves 143.9 micrometres, and Stevenson's conductance is shown to overestimate by a nearly constant 5.16%.

eess.SP

Feasibility and Convex Design of Probe-Position Matching in a Scanning X-Band Radar Array

The probe position of a microstrip element is normally chosen from the isolated-element input resistance. This paper replaces that procedure with a decision available before any array optimisation. A single Floquet unit-cell solution at one arbitrary probe position is decomposed into a feed inductance, a transformer ratio carrying the probe position, and an array-loaded resonator. Three closed-form results follow. The set of input impedances reachable by probe position and resonant length is a disk in the impedance plane. An exact match to a real reference Z0 exists if and only if Rp >= Z0 + Xp^2/Z0. When this fails, the best attainable reflection follows from the image of that disk under the bilinear map. Admitting one series reactance as a second variable, the worst-case reflection over a scan sector is shown to be quasiconvex and globally solvable by bisection. The results are applied to a sixteen-element X-band array and the corresponding 16x24 lattice. For the array considered, the isolated interior element is matched to -16.94 dB while the broadside active reflection is -6.6 dB. For the two-dimensional lattice the criterion is violated at every scan angle, and the minimax design improves the worst-case sector reflection from -2.6 to -11.1 dB. Both matching designs are predictions of the extracted circuit model and have not been re-solved in the full-wave model.

eess.SP