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arXiv · 2609.05424

Research on Intra-Chip Fusion Deployment and Optimization of Embodied Intelligence Business Operator NPU

Abstract

Embodied intelligent computing integrates perception, computation and control. Traditional separate deployment of the three tasks leads to frequent data transmission, high latency and low hardware efficiency, failing to satisfy millisecond-level real-time requirements in dynamic scenarios. Besides, most operator optimization methods rely on foreign GPU platforms, while full-process collaborative optimization for domestic Phytium-Cambricon heterogeneous architectures is insufficient. This paper builds a domestic heterogeneous computing platform with Phytium FT-2000/4 processor and Cambricon MLU370 acceleration card, and proposes an NPU on-chip fusion deployment and full-process operator collaborative optimization strategy for perception, computation and control pipelines. Targeting embodied robot applications, modular optimization is conducted, including MLU hardware adaptation of motion blur correction operators for high-speed imaging, lightweight inference optimization of ViT models, and customized operator development for multi-DOF inverse kinematics solution. An on-chip data closed-loop and pipeline collaboration-based single-card solution is proposed to implement integrated execution of all perception-computation-control tasks on MLU370. Experimental results show that the proposed method achieves a full-process single-frame latency of 18.7 ms and a speedup of 2.89 compared with NVIDIA Jetson AGX Xavier, with 82.6% MLU utilization and comparable accuracy to mainstream platforms. This work offers a practical reference for domestic engineering applications of integrated embodied intelligent computing services.

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BibTeXRIS

Yuchen Zhu, Longxiang Yin, Wanyu Wang, Jieke Lin, Guoqiang Zou, Zirui Cao, Yuling Yuan, Xiaolan Fan, Lifen Chen, Hao Zheng, Qizhang He, Hongyu Zhou, Chunhai Yu. 2026-05-26. Research on Intra-Chip Fusion Deployment and Optimization of Embodied Intelligence Business Operator NPU. https://arxiv.org/abs/2609.05424

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