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arXiv · 2610.24136

Gate-defined quantum dot and charge noise analysis in a Forksheet transistor

Dominic Leclerc·Claude Rohrbacher·Alexis Morel·Joffrey Rivard·Romain Ritzenthaler·Christian Lupien·Hans Mertens·Naoto Horiguchi·Eva Dupont-Ferrier
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Abstract

We report the cryogenic characterization of a 14-nm nMOS Forksheet transistor down to 10 mK. We demonstrate that the device retains transistor operation with improved characteristics at cryogenic temperatures, while also forming a gate-defined quantum dot that can be tuned to the single-electron regime. In the quantum-dot regime, we perform low-frequency charge-noise measurements across different charge occupations and observe an average charge-noise amplitude of $\langle S_0\rangle = 10\;μ\mathrm{eV}/\sqrt{\mathrm{Hz}}$ at 1 Hz, with a minimum measured value of $3.3\;μ\mathrm{eV}/\sqrt{\mathrm{Hz}}$. These results highlight the potential of Forksheet technology for the monolithic cointegration of quantum and classical CMOS functionalities in future quantum processors.

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Dominic Leclerc, Claude Rohrbacher, Alexis Morel, Joffrey Rivard, Romain Ritzenthaler, Christian Lupien, Hans Mertens, Naoto Horiguchi, Eva Dupont-Ferrier. 2026-10-16. Gate-defined quantum dot and charge noise analysis in a Forksheet transistor. https://arxiv.org/abs/2610.24136

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