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QCDOC: A 10-teraflops scale computer for lattice QCD

D. Chen·N. H. Christ·C. Cristian·Z. Dong·A. Gara·K. Garg·B. Joo·C. Kim·L. Levkova·X. Liao·R. D. Mawhinney·S. Ohta·T. Wettig
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Abstract

The architecture of a new class of computers, optimized for lattice QCD calculations, is described. An individual node is based on a single integrated circuit containing a PowerPC 32-bit integer processor with a 1 Gflops 64-bit IEEE floating point unit, 4 Mbyte of memory, 8 Gbit/sec nearest-neighbor communications and additional control and diagnostic circuitry. The machine's name, QCDOC, derives from ``QCD On a Chip''.

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D. Chen, N. H. Christ, C. Cristian, Z. Dong, A. Gara, K. Garg, B. Joo, C. Kim, L. Levkova, X. Liao, R. D. Mawhinney, S. Ohta, T. Wettig. 2000-11-01. QCDOC: A 10-teraflops scale computer for lattice QCD. https://doi.org/10.1016/s0920-5632(01)01014-3

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