arXiv subjects

Alessandro Paghi

Publications and source records attributed to Alessandro Paghi.

12 recordsLinked to original sources

arXiv2026

Extremely weak electron-phonon coupling in Josephson junctions built on InAs on Insulator

InAs-on-Insulator (InAsOI) enables an effective superconducting proximity effect and extremely weak electron-phonon (e-ph) coupling, allowing precise electronic-temperature control with minimal power. Using Josephson junction thermometry, we extract sub-Kelvin e-ph coupling parameters, confirming strong thermal decoupling and robust superconducting performance. The combination of weak e-ph interaction and full electrostatic tunability makes InAsOI a powerful platform for coherent caloritronics, ultrasensitive bolometry, single-photon detection, and gate-controlled superconducting thermal circuits.

cond-mat.supr-con↗

arXiv2025

Giant thermal modulation via a semiconductor-superconductor photonic field-effect heat transistor

We present a groundbreaking demonstration of thermal modulation in a field-effect-controllable semiconductor-superconductor hybrid structure, wherein the heating mechanism is exclusively radiative. The architecture comprises two reservoirs separated by $\sim 1$ mm and interconnected via a completely non-galvanic electrical circuit, enabling the transfer of black-body radiation from the hot to the cold reservoir. Our device utilizes a superconducting Josephson field-effect transistor to achieve magnetic-field-free gate-tunable regulation of heat currents within the circuit. While prior studies have indicated the potential for electrostatic modulation of thermal transport properties, our framework demonstrates a temperature modulation of up to $\sim 45$ mK, exceeding prior findings by more than an order of magnitude. Furthermore, it proves a thermal transimpedance of $\sim 20$ mK/V at a bath temperature of $30$ mK. The development of such systems holds substantial promise for advancing heat management and routing in quantum chips and radiation sensors, as it enables precise nonlocal control of heat flow towards a designated structure, even when the heat source is distant and non-galvanically coupled.

cond-mat.mes-hall↗

arXiv2025

Supercurrent Time Division Multiplexing with Solid-State Integrated Hybrid Superconducting Electronics

Time-division multiplexing of cryogenic signals is a promising approach to reduce space requirements, shorten cooldown times, and increase the number of quantum devices measured per cooldown. We demonstrate time-division multiplexing of non-dissipative supercurrents using voltage-controlled hybrid superconducting demultiplexers. These chips integrate superconducting Josephson Field Effect Transistors including Al superconducting electrodes, proximitized semiconducting InAs channels, and hafnium oxide gate insulators. Each transistor fully suppresses the switching current and increases the resistance 20 times under a gate voltage of -4.5 V. A demultiplexer with one input and eight outputs showed a non-dissipative input range of +-2 uA, operating up to 100 MHz in signal frequency and 100 kHz in switching frequency at 50 mK. It achieved near-zero insertion loss in the superconducting state and an ON/OFF ratio of 17.5 dB. By optimizing the signal layout, the operation was extended up to 4 GHz using a demultiplexer with two outputs.

cond-mat.supr-con↗

arXiv2025

The Ferroelectric Superconducting Field Effect Transistor

The ferroelectric field-effect transistor (Fe-FET) is a three-terminal semiconducting device first introduced in the 1950s. Despite its potential, a significant boost in Fe-FET research occurred about ten years ago with the discovery of ferroelectricity in hafnium oxide. This material has been incorporated into electronic processes since the mid-2000s. Here, we observed ferroelectricity in a superconducting Josephson FET (Fe-JoFET) operating at cryogenic temperatures below 1 Kelvin. The Fe-JoFET was fabricated on the InAsOI platform, which features an InAs epilayer hosted by an electrical insulating substrate, using HfO2 as the gate insulator, making it a promising candidate due to its ferroelectric properties. The Fe-JoFET exhibits significant hysteresis in the switching current and normal-state resistance transfer characteristics, which depend on the range of gate voltages. This phenomenon opens a new research area exploring the interaction between ferroelectricity and superconductivity in hybrid superconducting-semiconducting systems, with potential applications in cryogenic data storage and computation. Supporting this, the Fe-JoFET was operated as a cryogenic superconducting single memory cell, exhibiting both dissipative and non-dissipative states. Its non-volatility was tested over a 24-hour measurement period. We also demonstrated that the Fe-JoFET can retain information at temperatures above the superconductor critical temperature, resulting in a temperature-fault-tolerant memory cell resistant to temperature oscillations or, in the worst case, cryostat faults.

cond-mat.supr-con↗

arXiv2025

Josephson Field Effect Transistors with InAs on Insulator and High Permittivity Gate Dielectrics

InAs on Insulator (InAsOI) has been recently demonstrated as a promising platform to develop hybrid semiconducting-superconducting Josephson Junctions (JJs) and Josephson Field Effect Transistors (JoFETs). The InAsOI consists of an InAs epilayer grown onto a cryogenic-electrically-insulating InAlAs metamorphic buffer, which allows the electrical decoupling of surface-exposed adjacent devices together with a high critical current density integration. The miniaturization of Si microchips has progressed significantly due to the integration of high permittivity (high-k) gate insulators, allowing an increased gate coupling with the transistor channel with consequent reduced gate operating voltages and leakages. As well as for Si-based FETs, integrating high-k gate insulators with JoFETs promises similar advantages in superconducting electronics. Here, we investigate the gate-tunable electrical properties of InAsOI-based JoFETs featuring different high-k gate insulators, namely, HfO2 and Al2O3. We found that both the ungated and gate-tunable electrical properties of the JoFETs are strongly dependent on the insulator chosen. With both dielectrics, the JoFETs can entirely suppress the switching current and increase the normal state resistance by 10-20 times using negative gate voltages. The HfO2-JoFETs exhibit improved gate-tunable electrical performance compared to those achieved with Al2O3-JoFETs, which is related to the higher permittivity of the insulator. Gate-dependent electrical properties of InAsOI-based JoFETs were evaluated in the temperature range from 50 mK to 1 K. Moreover, under the influence of an out-of-plane magnetic field, JoFETs exhibited an unconventional Fraunhofer diffraction pattern, from which an edge-peaked supercurrent density distribution was calculated.

cond-mat.supr-con↗

arXiv2025

Structural and Transport Properties of Thin InAs Layers Grown on InxAl1-xAs Metamorphic Buffers

Indium Arsenide is a III-V semiconductor with low electron effective mass, a small band gap, strong spin-orbit coupling, and a large g-factor. These properties and its surface Fermi level pinned in the conduction band make InAs a good candidate for developing superconducting solid-state quantum devices. Here, we report the epitaxial growth of very thin InAs layers with thicknesses ranging from 12.5 nm to 500 nm grown by Molecular Beam Epitaxy on InxAl1-xAs metamorphic buffers. Differently than InAs substrates, these buffers have the advantage of being insulating at cryogenic temperatures, which allows for multiple device operations on the same wafer and thus making the approach scalable. The structural properties of the InAs layers were investigated by high-resolution X-ray diffraction, demonstrating the high crystal quality of the InAs layers. Furthermore, their transport properties, such as total and sheet carrier concentration, sheet resistance, and carrier mobility, were measured in the van der Pauw configuration at room temperature. A simple conduction model was employed to quantify the surface, bulk, and interface contributions to the overall carrier concentration and mobility.

cond-mat.mes-hall↗

arXiv2025

Cryogenic Behavior of High-Permittivity Gate Dielectrics: The Impact of the Atomic Layer Deposition Temperature and the Lithographic Patterning Method

Dielectrics featuring a high relative permittivity, i.e., high-k dielectrics, have become the standard insulators in gate architectures, enhancing the electrical performance of both room temperature and cryogenic electronics. This study delves into the cryogenic (3 K) performance of high-k dielectrics commonly used as gate insulators. We fabricated Al2O3 and HfO2 layers via Atomic Layer Deposition (ALD) and we extrapolated relative permittivity (k) and dielectric strength (E_BD) from AC (100 Hz to 100 kHz) and DC measurements on metal-insulator-metal capacitors. Our findings reveal a strong dependence of HfO2 cryogenic performance on the ALD growth temperature, while the latter shows a negligible impact on Al2O3. We estimated a ~9 % and ~14 % reduction of the relative permittivity of HfO2 and Al2O3, respectively, from 300 K to 3 K. Additionally, we designed and fabricated Al2O3/HfO2 bilayers and we checked their properties at cryogenic temperatures. The study also investigates the impact of the patterning method, namely, UV or electron-beam lithography (acceleration voltage of 10, 20, or 30 kV), on the high-k dielectric properties.

cond-mat.mtrl-sci↗

arXiv2025

Estimation of the FR4 Microwave Dielectric Properties at Cryogenic Temperature for Quantum-Chip-Interface PCBs Design

Ad-hoc interface PCBs (Printed Circuit Boards) are today the standard connection between cryogenic cabling and quantum chips. Besides low-loss and low-temperature-dependent-dielectric-permittivity materials, Flame Resistance n.4 (FR4) provides a low-cost solution for fabrication of cryogenic PCBs. Here, we report on an effective way to evaluate the dielectric performance of a FR4 laminate used as substrate for cryogenic microwave PCBs. We designed a coplanar waveguide λ/2 open-circuit series resonator, and we fabricated the PCB using a low-cost manufacturing process, obtaining in-plane geometric features with maximum variations of 50-100 um compared to the PCB design. Such a geometry allows to exploit the resonance peak of the resonator to measure the variation of the complex permittivity as a function of the temperature. The resonance peak frequency was used to estimate the real permittivity, achieving a sensitivity of -470 MHz and a resolution of 1.2x10^-2. Similarly, the resonance peak magnitude was involved in the extrapolation of the loss tangent, reaching a sensitivity of ~-337 dB and a resolution of 1.6x^10-4. For the FR4 laminate used, we estimated a 9 % reduction of the real permittivity and a 70 % reduction of the loss tangent in the temperature range from 300 to 4 K. The proposed approach can be immediately extended to the detection of cryogenic temperature-dependent dielectric performance of any kind of substrate.

physics.ins-det↗

arXiv2025

InAs on Insulator: A New Platform for Cryogenic Hybrid Superconducting Electronics

Superconducting circuits based on hybrid InAs Josephson Junctions (JJs) play a starring role in the design of fast and ultra-low power consumption solid-state quantum electronics and exploring novel physical phenomena. Conventionally, 3D substrates, 2D quantum wells (QWs), and 1D nanowires (NWs) made of InAs are employed to create superconducting circuits with hybrid JJs. Each platform has its advantages and disadvantages. Here, we proposed the InAs-on-insulator (InAsOI) as a groundbreaking platform for developing superconducting electronics. An epilayer of semiconducting InAs with different electron densities was grown onto an InAlAs metamorphic buffer layer, efficiently used as a cryogenic insulator to decouple adjacent devices electrically. JJs with various lengths and widths were fabricated employing Al as a superconductor and InAs with different electron densities. We achieved a switching current density of 7.3 uA/um, a critical voltage of 50-to-80 uV, and a critical temperature equal to that of the superconductor used. For all the JJs, the switching current follows a characteristic Fraunhofer pattern with an out-of-plane magnetic field. These achievements enable the use of InAsOI to design and fabricate surface-exposed Josephson Field Effect Transistors with high critical current densities and superior gating properties.

cond-mat.supr-con↗

arXiv2025

Back-action supercurrent diodes

Back-action refers to a response that retro-acts on a system to tailor its properties with respect to an external stimulus. This effect is at the heart of many electronic devices such as amplifiers, oscillators, and sensors. Here, we demonstrate that back-action can be exploited to achieve non-reciprocal transport in superconducting circuits. In our devices, dissipationless current flows in one direction whereas dissipative transport occurs in the opposite direction. Supercurrent diodes presented so far rely on magnetic elements or vortices to mediate charge transport or external magnetic fields to break time-reversal symmetry. Back-action solely turns a conventional reciprocal superconducting weak link with no asymmetry between the current bias directions into a rectifier, where the critical current amplitude depends on the bias sign. The self-interaction of the supercurrent stems from the gate tunability of the critical current in metallic and semiconducting systems, which promotes nearly ideal magnetic field-free rectification with selectable polarity.

cond-mat.mes-hall↗

arXiv2024

Extremely weak sub-kelvin electron-phonon coupling in InAs On Insulator

We are proposing, as an ideal candidate for caloritronic devices operating at subKelvin temperatures, a hybrid superconductor-semiconductor platform named InAs on insulator (InAsOI). This heterostructure is made by doped InAs grown on an insulating buffer of InAlAs on a GaAs substrate. Caloritronic devices aim to heat or cool electrons out of equilibrium with respect to the phonon degree of freedom. However, their performances are usually limited by the strength of the electron-phonon (e-ph) coupling and the associated power loss. Our work discusses the advantages of the InAsOI platform, which are based on the significantly low e-ph coupling measured compared to all-metallic state-of-the-art caloritronic devices. Our structure demonstrates values of the e-ph coupling constant up to two orders of magnitude smaller than typical values in metallic structures.

cond-mat.supr-con↗

arXiv2023

Gate-controlled supercurrent effect in dry-etched Dayem bridges of non-centrosymmetric niobium rhenium

The application of a gate voltage to control the superconducting current flowing through a nanoscale superconducting constriction, named as gate-controlled supercurrent (GCS), has raised great interest for fundamental and technological reasons. To gain a deeper understanding of this effect and develop superconducting technologies based on it, the material and physical parameters crucial for GCS must be identified. Top-down fabrication protocols should be also optimized to increase device scalability, although studies suggest that top-down fabricated devices are more resilient to show GCS. Here, we investigate gated superconducting nanobridges made with a top-down fabrication process from thin films of the non-centrosymmetric superconductor NbRe. Unlike other devices previously reported, our NbRe devices systematically exhibit GCS, when made in specific conditions, which paves the way for higher device scalability. Our results also suggest that surface properties of NbRe nanobridges and their modification during fabrication are key for GCS.

cond-mat.supr-con↗