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Alexandru Paler

Publications and source records attributed to Alexandru Paler.

At least 19 recordsLinked to original sources

QCI Connect: A Modular Full-Stack Quantum Computing Platform

In a world of various competing quantum computing architectures, hardware-agnostic, full-stack platforms are necessary to bring the full power of quantum computing hardware to domain experts via the cloud. QCI Connect and its Software Development Kit provide a reference architecture for a full-stack platform with a modular design and open-source interface definitions, built to facilitate a community-driven application ecosystem. Here, we present its overall design and features, central interfaces, and lessons learned, both for users of the platform and as a reference guide for future developments.

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Circuit-Level Noise Estimation via Shuttling in Plaquette Circuits

We present a method for estimating QEC circuit-level noise levels assuming that only single-shot measurements are available (e.g. measurements are slow and performed in a zoned/parallel fashion), and that lower level quantum hardware calibration is not possible (e.g. cloud access) or not feasible (e.g. large scale computing). We develop and run surface code plaquette experiments using two syndrome qubit configurations: FRESH, involving fresh qubits for each plaquette repetition, and RECYCLE, reusing qubits. To validate our approach, we compile plaquettes to ion-trap (IonQ Aria1) native gate set and apply hardware-aware rewrite templates to reduce circuit depth and execution time. We also run the experiments on a non-shuttling, superconducting processor (IBM Torino). We estimate circuit-level noise rates from the resulting single-shot plaquette measurement statistics, and conclude numerically about the viability of low-depth QEC experiments.

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Achieving Thresholds via Standalone Belief Propagation on Surface Codes

The usual belief propagation (BP) decoders are, in general, exchanging local information on the Tanner graph of the quantum error-correcting (QEC) code and, in particular, are known to not have a threshold for the surface code. We propose novel BP decoders that exchange messages on the decoding graph and obtain code capacity thresholds via standalone BP for the surface code under depolarizing noise. Our approach, similarly to the minimum weight perfect matching (MWPM) decoder, is applicable to any graphlike QEC code. The thresholds observed with our decoders are close to those obtained by MWPM. This result opens the path towards scalable hardware-accelerated implementations of MWPM-compatible decoders.

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Untangling Surface Codes: Bridging Braids and Lattice Surgery

We present a systematic method for translating fault-tolerant quantum circuits between their braiding and lattice surgery (LS) representations within the surface code. Our approach employs the ZX calculus to establish an equivalence between these two paradigms, enabling verified, bidirectional conversion of arbitrary surface-code-level circuits. We show that both braiding and LS operations can be uniformly expressed as compositions of multibody measurements and demonstrate that the Raussendorf compression rule encompasses all known braid and bridge optimizations. We also introduce a novel CNOT circuit with LS. Our framework provides a foundation for the automated verification, compilation, and benchmarking of large-scale surface code computations, advancing toward a unified formal language for topological quantum computation.

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QASER: Breaking the Depth vs. Accuracy Trade-Off for Quantum Architecture Search

Quantum computing faces a key challenge: balancing the need for low circuit depth (crucial for fault tolerance) with the high accuracy required for complex computations like quantum chemistry and error correction, which typically require deeper circuits. We overcome this trade-off by introducing a novel reinforcement learning approach featuring engineered reward functions, called \textbf{QASER}, that take into account seemingly contradictory optimization goals. This reward enables the compilation of circuits with lower depth and higher accuracy, significantly outperforming state-of-the-art techniques. Benchmarks on quantum chemistry state preparation circuits demonstrate stable compilations. We achieve up to 50\% improved accuracy, while reducing 2-qubit gate counts and depths by 20\%. This advancement enables more efficient and reliable quantum compilation.

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Medusa: Detecting and Removing Failures for Scalable Quantum Computing

Quantum circuits will experience failures that lead to computational errors. We introduce Medusa, an automated compilation method for lowering a circuit's failure rate. Medusa uses flags to predict the absence of high-weight errors. Our method can numerically upper bound the failure rate of a circuit in the presence of flags, and fine tune the fault-tolerance of the flags in order to reach this bound. We assume the flags can have an increased fault-tolerance as a result of applying surface QECs to the gates interacting with them. We use circuit level depolarizing noise to evaluate the effectiveness of these flags in revealing the absence of the high-weight stabilizers. Medusa reduces the cost of quantum-error-correction (QEC) because the underlying circuit has a lower failure rate. We benchmark our approach using structured quantum circuits representative of ripple-carry adders. In particular, our flag scheme demonstrates that for adder-like circuits, the failure rate of large-scale implementations can be lowered to fit the failure rates of smaller-scale circuits. We show numerically that a slight improvement in the local fault-tolerance of the flag-qubits can lead to a reduction in the overall failure rate of the entire quantum circuit.

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ATLAS: Efficient Atom Rearrangement for Defect-Free Neutral-Atom Quantum Arrays Under Transport Loss

Neutral-atom quantum computers encode qubits in individually trapped atoms arranged in optical lattices. Achieving defect-free atom configurations is essential for high-fidelity quantum gates and scalable error correction, yet stochastic loading and atom loss during rearrangement hinder reliable large-scale assembly. This work presents ATLAS, an open-source atom transport algorithm that efficiently converts a randomly loaded $W \times W$ lattice into a defect-free $L \times L$ subarray while accounting for realistic physical constraints, including finite acceleration, transfer time, and per-move loss probability. In the planning phase, optimal batches of parallel moves are computed on a lossless virtual array; during execution, these moves are replayed under probabilistic atom loss to maximize the expected number of retained atoms. Monte Carlo simulations across lattice sizes $W=10$--$100$, loading probabilities $p_{\mathrm{occ}}=0.5$--$0.9$, and loss rates $p_{\mathrm{loss}}=0$--$0.05$ demonstrate fill rates above $99\%$ within six iterations and over $90\%$ atom retention at low loss. The algorithm achieves sublinear move scaling ($\propto M^{0.55}$) and linear growth of required initial size with target dimension, outperforming prior methods in robustness and scalability -- offering a practical path toward larger neutral-atom quantum arrays.

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Decoding Correlated Errors in Quantum LDPC Codes

We introduce a decoding framework for correlated errors in quantum LDPC codes under circuit-level noise. The core of our approach is a graph augmentation and rewiring for interference (GARI) method, which modifies the correlated detector error model by eliminating 4-cycles involving Y-type errors, while preserving the equivalence of the decoding problem. We test our approach on the bivariate bicycle codes of distances 6, 10, and 12. A normalized min-sum decoder with a hybrid serial-layered schedule is applied on the transformed graph, achieving high accuracy with low latency. Performance is further enhanced through ensemble decoding, where 24 randomized normalized min-sum decoders run in parallel on the transformed graph, yielding the highest reported accuracy (on par with XYZ-Relay-BP) with unprecedented speed for the tested codes under uniform depolarizing circuit level noise. For the distance 12 (gross) code, our approach yields a logical error rate of $(6.70 \pm 1.93) \times 10^{-9}$ at a practical physical error rate of $10^{-3}$. Furthermore, preliminary FPGA implementation results show that such high accuracy can be achieved in real time, with a per-round average decoding latency of 273 ns and sub-microsecond latency in 99.99% of the decoding instances.

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Ultra-Large-Scale Compilation and Manipulation of Quantum Circuits with Pandora

There is an enormous gap between what quantum circuit sizes can be compiled and manipulated with the current generation of quantum software and the sizes required by practical applications such as quantum chemistry or Shor's algorithm. We present Pandora, an efficient, open-source, multithreaded, high-performance-computing-enabled tool based on circuit rewrites. Pandora can be used for quantum circuit equivalence checking, full compilations of large circuits, and scalable, streaming quantum resource estimation frameworks. Pandora can easily handle billions of gates and can stream circuit partitions in resource estimation pipelines at very high rates. We utilized Pandora for full compilations of Fermi-Hubbard 100x100 and 1024-bit Shor's algorithm circuits. Compared to TKET and Qiskit, we determine a performance advantage for manipulating circuits of more than 10000 gates. For equivalence checking tasks, Pandora outperforms MQT.QCEC on specific circuits that have more than 32 qubits. The performance and versatility of Pandora open novel paths in quantum software.

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Quantum Circuit Caches and Compressors for Low Latency, High Throughput Computing

Utility-scale quantum programs contain operations on the order of $>10^{15}$ which must be prepared and piped from a classical co-processor to the control unit of the quantum device. The latency of this process significantly increases with the size of the program: existing high-level classical representations of quantum programs are typically memory intensive and do not na\"ively efficiently scale to the degree required to execute utility-scale programs in real-time. To combat this limitation, we propose the utilization of high-level quantum circuit caches and compressors. The first save on the time associated with repetitive tasks and sub-circuits, and the latter are useful for representing the programs/circuits in memory-efficient formats. We present numerical evidence that caches and compressors can offer five orders of magnitude lower latencies during the automatic transpilation of extremely large quantum circuits.

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Fooling the Decoder: An Adversarial Attack on Quantum Error Correction

Neural network decoders are essential for fault-tolerant quantum computation, yet their internal mechanisms remain poorly understood. Leading machine learning decoders use recurrent and transformer models (e.g., AlphaQubit), and reinforcement learning (RL) is increasingly used to train such models. In this work we ask whether an RL surface code decoder, DeepQ, can be made to fail systematically. Our white-box search repeatedly draws candidate syndrome volumes from the unmodified noise model and retains the one the decoder's learned $Q$-function is most pessimistic about. At code distance 5 under phenomenological depolarising noise, it cuts the average logical qubit lifetime from roughly $10^5$ cycles to 60. We quantify what this costs: the retained error histories are individually plausible, but the selected trajectory is roughly a $10^{-18}$ tail event under undisturbed noise, so the effect is bought entirely by the ability to select among physically realisable error configurations. Controls confirm this is not an artefact of a weak target: the decoder resists noise fluctuations, tolerates an MWPM referee, and is fault tolerant at checkable distances. The result is a robustness upper bound for one decoder under one noise model, but to our knowledge the first adversarial attack of a machine learning QEC decoder.

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Universal quantum computation via scalable measurement-free error correction

We show that universal quantum computation can be concretely made fault-tolerant without mid-circuit measurements. To this end, we introduce a measurement-free deformation protocol of the Bacon-Shor code to realize a logical $\mathit{CCZ}$ gate. Combined with a fold-transversal logical Hadamard gate, this enables a universal set of fault-tolerant operations using only transversal gates and qubit permutations. For the purpose of benchmarking under circuit-level noise, we develop an efficient method to simulate non-Clifford circuits with a small number of Hadamard gates. Separately, we demonstrate that certain CSS codes can be concatenated without measurements or having to rely on a universal logical gate set. This is made possible by means of a resource-efficient gadget -- termed the ``disposable Toffoli gadget'' -- that realizes the error-correcting feedback. Then, under concatenation of the Bacon-Shor code, we observe a fault-tolerance threshold at a circuit-level depolarizing noise rate of approximately $0.12\,\%$. Together, the deformation and concatenation protocols outline a blueprint for a fully fault-tolerant architecture without any feed-forward operation, particularly suited to state-of-the-art neutral-atom platforms.

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Belief propagation for general graphical models with loops

There is an increasing interest in scaling tensor network methods through belief propagation (BP), as well as increasing the accuracy of BP through tensor network methods. We develop a unification framework that takes an arbitrary graphical model with loops and provides message passing update rules and inference equations. We show that recent state-of-the-art methods regarding tensors and BP, like block belief propagation and tensor network message passing, are special instances of our framework. From a practical perspective, we discuss how our framework can be useful to understand the benefits of scheduling in BP, and show how it can be used for decoding purposes in quantum error correction. We simulate the computation of marginals, internal energy, Shannon entropy and the partition function on synthetic topologies (Kagome lattice and lattices resembling quantum error-correcting codes) and a real world topology of a power grid. The results show orders of magnitude accuracy increases for modest computational overheads. For the marginals, for example, we show that our framework can achieve an accuracy improvement of more than six orders of magnitude over tensor network BP.

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Architecting a reliable quantum operating system: microkernel, message passing and supercomputing

A quantum operating system (QCOS) is a classic software running on classic hardware. The QCOS is preparing, starting, controlling and managing quantum computations. The reliable execution of fault-tolerant quantum computations will require the QCOS to be as reliable and fault-tolerant as the computation itself. In the following, we discuss why a QCOS should be architected according to the following principles: 1) using a microkernel; 2) the components are working in an aggregated, non-stacked manner and communicate by message passing; 3) the components are executed by default on supercomputers, unless there are very good reasons not to. These principles can guarantee that the execution of error-corrected, fault-tolerant quantum computation is not vulnerable to the failures of the QCOS.

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Machine Learning Message-Passing for the Scalable Decoding of QLDPC Codes

We present Astra, a novel and scalable decoder using graph neural networks. Our decoder works similarly to solving a Sudoku puzzle of constraints represented by the Tanner graph. In general, Quantum Low Density Parity Check (QLDPC) decoding is based on Belief Propagation (BP, a variant of message-passing) and requires time intensive post-processing methods such as Ordered Statistics Decoding (OSD). Without using any post-processing, Astra achieves higher thresholds and better logical error rates when compared to BP+OSD, both for surface codes trained up to distance 11 and Bivariate Bicycle (BB) codes trained up to distance 18. Moreover, we can successfully extrapolate the decoding functionality: we decode high distances (surface code up to distance 25 and BB code up to distance 34) by using decoders trained on lower distances. Astra+OSD is faster than BP+OSD. We show that with decreasing physical error rates, Astra+OSD makes progressively fewer calls to OSD when compared to BP+OSD, even in the context of extrapolated decoding. Astra(+OSD) achieves orders of magnitude lower logical error rates for BB codes compared to BP(+OSD). The source code is open-sourced at \url{https://github.com/arshpreetmaan/astra}.

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On the Constant Depth Implementation of Pauli Exponentials

We decompose, under the very restrictive linear nearest-neighbour connectivity, $Z^{\otimes n}$ exponentials of arbitrary length into circuits of constant depth using $\mathcal{O}(n)$ ancillae and two-body XX and ZZ interactions. Consequently, a similar method works for arbitrary Pauli exponentials. We prove the correctness of our approach, after introducing novel rewrite rules for circuits which benefit from qubit recycling. The decomposition has a wide variety of applications ranging from the efficient implementation of practical fault-tolerant lattice surgery computations, to expressing arbitrary stabilizer circuits via two-body interactions only and parallel decoding of quantum error-correcting computations.

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Superconducting qubits in the millions: the potential and limitations of modularity

The development of fault-tolerant quantum computers (FTQCs) is receiving increasing attention within the quantum computing community. Like conventional digital computers, FTQCs, which utilize error correction and millions of physical qubits, have the potential to address some of humanity's grand challenges. However, accurate estimates of the tangible scale of future FTQCs, based on transparent assumptions, are uncommon. How many physical qubits are necessary to solve a practical problem intractable for classical hardware? What costs arise from distributing quantum computation across multiple machines? This paper presents an architectural model of a potential FTQC based on superconducting qubits, divided into discrete modules and interconnected via coherent links. We employ a resource estimation framework and software tool to assess the physical resources required to execute specific quantum algorithms compiled into their graph-state form and arranged onto a modular superconducting hardware architecture. Our tool can predict the size, power consumption, and execution time of these algorithms based on explicit assumptions about the system's physical layout, thermal load, and modular connectivity. We assess the resources needed for quantum computation examples that serve as building blocks of proposed applications, quantifying the architectural bottlenecks and trade-offs that remain to be addressed to deliver utility.

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A High Performance Compiler for Very Large Scale Surface Code Computations

We present the first high performance compiler for very large scale quantum error correction: it translates an arbitrary quantum circuit to surface code operations based on lattice surgery. Our compiler offers an end to end error correction workflow implemented by a pluggable architecture centered around an intermediate representation of lattice surgery instructions. Moreover, the compiler supports customizable circuit layouts, can be used for quantum benchmarking and includes a quantum resource estimator. The compiler can process millions of gates using a streaming pipeline at a speed geared towards real-time operation of a physical device. We compiled within seconds 80 million logical surface code instructions, corresponding to a high precision Clifford+T implementation of the 128-qubit Quantum Fourier Transform (QFT). Our code is open-sourced at \url{https://github.com/latticesurgery-com}.

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