Morphology-Guided Deterministic Fabrication of Low-Noise High-Temperature Superconducting Quantum Interference Devices
Reproducible bicrystal high-temperature superconducting quantum interference devices remain limited by local variability along the grain boundaries that form the Josephson junctions. Here, we develop a site-selective fabrication workflow in which atomic force microscopy maps the intended junction region before lithography, quantifies an apparent grain-boundary width, rejects pore-rich segments, and writes a nearby registration mark for site-specific pattern alignment. The apparent grain-boundary width provides a practical morphology metric, with narrower regions consistently yielding larger critical currents and characteristic voltages. Iterative optimization within this workflow further improves junction and device performance, reaching a liquid-nitrogen-temperature field-noise level of 40 fT Hz^(-1/2). This strategy turns local grain-boundary heterogeneity from an uncontrolled source of variability into a basis for site-selective fabrication, providing a route towards scalable manufacturing of low-noise HTS SQUIDs with high uniformity.