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Christoph Adelmann

Publications and source records attributed to Christoph Adelmann.

At least 37 records · Page 2Linked to original sources

Parametric Excitation and Instabilities of Spin Waves driven by Surface Acoustic Waves

The parametric excitation of spin waves by coherent surface acoustic waves is demonstrated experimentally in metallic magnetic thin film structures. The involved magnon modes are analyzed with micro-focused Brillouin light scattering spectroscopy and complementary micromagnetic simulations combined with analytical modelling are used to determine the origin of the spin-wave instabilities. Depending on the experimental conditions, we observe spin-wave instabilities originating from different phonon-magnon and magnon-magnon scattering processes. Our results demonstrate that an efficient excitation of high amplitude, strongly nonlinear magnons in metallic ferromagnets is possible by surface acoustic waves, which opens novel ways to create micro-scaled nonlinear magnonic systems for logic and data processing that can profit from the high excitation efficiency of phonons using piezoelectricity.

cond-mat.other↗

Power transfer in magnetoelectric resonators

We derive an analytical model for the power transfer in a magnetoelectric film bulk acoustic resonator consisting of a piezoelectric--magnetostrictive bilayer. The model describes the dynamic magnetostrictive influence on the elastodynamics via an effective frequency-dependent stiffness constant. This allows for the calculation of both the magnetic and elastic power absorption in the resonator as well as of its energy efficiency when such a resonator is considered as a magnetic transducer. The model is then applied to example systems consisting of piezoelectric ScAlN and magnetostrictive CoFeB, Ni, or Terfenol-D layers.

physics.app-ph↗

Would Magnonic Circuits Outperform CMOS Counterparts?

In the early stages of a novel technology development, it is difficult to provide a comprehensive assessment of its potential capabilities and impact. Nevertheless, some preliminary estimates can be drawn and are certainly of great interest and in this paper we follow this line of reasoning within the framework of the Spin Wave (SW) computing paradigm. In particular, we are interested in assessing the technological development horizon that needs to be reached in order to unleash the full SW paradigm potential such that SW circuits can outperform CMOS counterparts in terms of energy consumption. In view of the zero power SWs propagation through ferromagnetic waveguides, the overall SW circuit power consumption is determined by the one associated to SWs generation and sensing by means of transducers. While current antenna based transducers are clearly power hungry recent developments indicate that magneto-electric (ME) cells have a great potential for ultra-low power SW generation and sensing. Given that MEs have been only proposed at the conceptual level and no actual experimental demonstration has been reported we cannot evaluate the impact of their utilization on the SW circuit energy consumption. However, we can perform a reverse engineering alike analysis to determine ME delay and power consumption upper bounds that can place SW circuits in the leading position. To this end, we utilize a 32-bit Brent-Kung Adder (BKA) as discussion vehicle and compute the maximum ME delay and power consumption that could potentially enable a SW implementation able to outperform its 7nm CMOS counterpart. We evaluate different BKA SW implementations that rely on conversion or normalization gate cascading and consider continuous or pulsed SW generation scenarios. 31nW is the maximum transducer power consumption for which a 32-bit BKA SW implementation can outperform its 7nm CMOS counterpart.

cond-mat.mes-hall↗

Fully Resonant Magneto-elastic Spin-wave Excitation by Surface Acoustic Waves under Conservation of Energy and Linear Momentum

We report on the resonant excitation of spin waves in micro-structured magnetic thin films by surface acoustic waves (SAWs). The spin waves as well as the acoustic waves are studied by micro-focused Brillouin light scattering spectroscopy. Besides the excitation of the ferromagnetic resonance, a process which does not fulfill momentum conservation, also the excitation of finite-wavelength spin waves can be observed at low magnetic fields. Using micromagnetic simulations, we verify that during this excitation both energy and linear momentum are conserved and fully transferred from the SAW to the spin wave.

cond-mat.other↗

Lumped circuit model for inductive antenna spin-wave transducers

We derive a lumped circuit model for inductive antenna spin-wave transducers in the vicinity of a ferromagnetic medium. The model considers the antenna's Ohmic resistance, its inductance, as well as the additional inductance due to the excitation of ferromagnetic resonance or spin waves in the ferromagnetic medium. As an example, the additional inductance is discussed for a wire antenna on top of a ferromagnetic waveguide, a structure that is characteristic for many magnonic devices and experiments. The model is used to assess the scaling properties and the energy efficiency of inductive antennas. Issues related to scaling antenna transducers to the nanoscale and possible solutions are also addressed.

cond-mat.mes-hall↗

Fanout of 2 Triangle Shape Spin Wave Logic Gates

Having multi-output logic gates saves much energy because the same structure can be used to feed multiple inputs of next stage gates simultaneously. This paper proposes novel triangle shape fanout of 2 spin wave Majority and XOR gates; the Majority gate is achieved by phase detection, whereas the XOR gate is achieved by threshold detection. The proposed logic gates are validated by means of micromagnetic simulations. Furthermore, the energy and delay are estimated for the proposed structures and compared with the state-of-the-art spin wave logic gates, and 16nm and 7nm CMOS. The results demonstrate that the proposed structures provide energy reduction of 25%-50% in comparison to the other 2-output spin-wave devices while having the same delay, and energy reduction between 43x and 0.8x when compared to the 16nm and 7nm CMOS while having delay overhead between 11x and 40x.

cond-mat.mes-hall↗

Spin Wave Based 4-2 Compressor

By their very nature, Spin Waves (SWs) consume ultra-low amounts of energy, which makes them suitable for ultra-low energy consumption applications. In addition, a compressor can be utilized to further reduce the energy consumption and enhance the speed of a multiplier. Therefore, we propose a novel energy efficient SW based 4-2 compressor consisting of 4 XOR gates and 2 Majority gates. The proposed compressor is validated by means of micromagnetic simulations and compared with the state-of-the-art SW, 22nm CMOS, Magnetic Tunnel Junction (MTJ), Domain Wall Motion (DWM), and Spin-CMOS technologies. The performance evaluation shows that the proposed compressor consumes 2.5x less and 1.25x less energy than the 22nm CMOS and the conventional SW compressor, respectively, whereas it consumes at least 3 orders of magnitude less energy than the MTJ, DWM, and Spin-CMOS designs. Furthermore, the compressor achieves the smallest chip real-estate. In summary, the performance evaluation of our proposed compressor shows that the SW technology has the potential to progress the state-of-the-art circuit design in terms of energy consumption and scalability.

cond-mat.mes-hall↗

Spin Wave Based Approximate 4:2 Compressor

In this paper, we propose an energy efficient SW based approximate 4:2 compressor comprising a 3-input and a 5-input Majority gate. We validate our proposal by means of micromagnetic simulations, and assess and compare its performance with one of the state-of-the-art SW, 45nm CMOS, and Spin-CMOS counterparts. The evaluation results indicate that the proposed compressor consumes 31.5\% less energy in comparison with its accurate SW design version. Furthermore, it has the same energy consumption and error rate as the approximate compressor with Directional Coupler (DC), but it exhibits 3x lower delay. In addition, it consumes 14% less energy, while having 17% lower average error rate than the approximate 45nm CMOS counterpart. When compared with the other emerging technologies, the proposed compressor outperforms approximate Spin-CMOS based compressor by 3 orders of magnitude in term of energy consumption while providing the same error rate. Finally, the proposed compressor requires the smallest chip real-estate measured in terms of devices.

cond-mat.mes-hall↗

Ab initio screening of metallic MAX ceramics for advanced interconnect applications

The potential of a wide range of layered ternary carbide and nitride MAX phases as conductors in interconnect metal lines in advanced CMOS technology nodes has been evaluated using automated first principles simulations based on density functional theory. The resistivity scaling potential of these compounds, i.e. the sensitivity of their resistivity to reduced line dimensions, has been benchmarked against Cu and Ru by evaluating their transport properties within a semiclassical transport formalism. In addition, their cohesive energy has been assessed as a proxy for the resistance against electromigration and the need for diffusion barriers. The results indicate that numerous MAX phases show promise as conductors in interconnects of advanced CMOS technology nodes.

cond-mat.mtrl-sci↗

Fan-out enabled spin wave majority gate

By its very nature, Spin Wave (SW) interference provides intrinsic support for Majority logic function evaluation. Due to this and the fact that the $3$-input Majority (MAJ3) gate and the Inverter constitute a universal Boolean logic gate set, different MAJ3 gate implementations have been proposed. However, they cannot be directly utilized for the construction of larger SW logic circuits as they lack a key cascading mechanism, i.e., fan-out capability. In this paper, we introduce a novel ladder-shaped SW MAJ3 gate design able to provide a maximum fan-out of 2 (FO2). The proper gate functionality is validated by means of micromagnetic simulations, which also demonstrate that the amplitude mismatch between the two outputs is negligible proving that an FO2 is properly achieved. Additionally, we evaluate the gate area and compare it with SW state-of-the-art and 15nm CMOS counterparts working under the same conditions. Our results indicate that the proposed structure requires 12x less area than the 15 nm CMOS MAJ3 gate and that at the gate level the fan-out capability results in 16% area savings, when compared with the state-of-the-art SW majority gate counterparts.

cond-mat.mes-hall↗

2-output spin wave programmable logic gate

This paper presents a 2-output Spin-Wave Programmable Logic Gate structure able to simultaneously evaluate any pair of AND, NAND, OR, NOR, XOR, and XNOR Boolean functions. Our proposal provides the means for fanout achievement within the Spin Wave computation domain and energy and area savings as two different functions can be simultaneously evaluated on the same input data. We validate our proposal by means of Object Oriented Micromagnetic Framework (OOMMF) simulations and demonstrate that by phase and magnetization threshold output sensing AND, OR, NAND, NOR and XOR and XNOR functionalities can be achieved, respectively. To get inside into the potential practical implications of our approach we use the proposed gate to implement a 3-input Majority gate, which we evaluate and compare with state of the art equivalent implementations in terms of area, delay, and energy consumptions. Our estimations indicate that the proposed gate provides 33% and 16% energy and area reduction, respectively, when compared with spin-wave counterpart and 42% energy reduction while consuming 12x less area when compared to a 15 nm CMOS implementation.

cond-mat.mes-hall↗

n-bit Data Parallel Spin Wave Logic Gate

Due to their very nature, Spin Waves (SWs) created in the same waveguide, but with different frequencies, can coexist while selectively interacting with their own species only. The absence of inter-frequency interferences isolates input data sets encoded in SWs with different frequencies and creates the premises for simultaneous data parallel SW based processing without hardware replication or delay overhead. In this paper we leverage this SW property by introducing a novel computation paradigm, which allows for the parallel processing of n-bit input data vectors on the same basic SW based logic gate. Subsequently, to demonstrate the proposed concept, we present 8-bit parallel 3-input Majority gate implementation and validate it by means of Object Oriented MicroMagnetic Framework (OOMMF) simulations. To evaluate the potential benefit of our proposal we compare the 8-bit data parallel gate with equivalent scalar SW gate based implementation. Our evaluation indicates that 8-bit data 3-input Majority gate implementation requires 4.16x less area than the scalar SW gate based equivalent counterpart while preserving the same delay and energy consumption figures.

cond-mat.mes-hall↗

Experimental Realization of a Passive GHz Frequency-Division Demultiplexer for Magnonic Logic Networks

The emerging field of magnonics employs spin waves and their quanta, magnons, to implement wave-based computing on the micro- and nanoscale. Multi-frequency magnon networks would allow for parallel data processing within single logic elements whereas this is not the case with conventional transistor-based electronic logic. However, a lack of experimentally proven solutions to efficiently combine and separate magnons of different frequencies has impeded the intensive use of this concept. In this Letter, the experimental realization of a spin-wave demultiplexer enabling frequency-dependent separation of magnonic signals in the GHz range is demonstrated. The device is based on two-dimensional magnon transport in the form of spin-wave beams in unpatterned magnetic films. The intrinsic frequency-dependence of the beam direction is exploited to realize a passive functioning obviating an external control and additional power consumption. This approach paves the way to magnonic multiplexing circuits enabling simultaneous information transport and processing.

cond-mat.mes-hall↗

Reconfigurable sub-micron spin-wave majority gate with electrical transducers

Spin waves are excitations in ferromagnetic media that have been proposed as information carriers in hybrid spintronic devices with much lower operation power than conventional charge-based electronics. Their wave nature can be exploited in majority gates by using interference for computation. However, a scalable spin-wave majority gate that can be co-integrated alongside conventional electronics is still lacking. Here, we demonstrate a sub-micron inline spin-wave majority gate with fan-out. Time-resolved imaging of the magnetization dynamics by scanning transmission x-ray microscopy illustrates the device operation. All-electrical spin-wave spectroscopy further demonstrates majority gates with sub-micron dimensions, reconfigurable input and output ports, and frequency-division multiplexing. Challenges for hybrid spintronic computing systems based on spin-wave majority gates are discussed.

physics.app-ph↗

Room And Cryogenic Temperature Behaviour of Magnetic Sensors Based on Gan/Si Single Saw Resonators

This work analyzes resonance frequency shift vs. the applied magnetic field strength for GHz operating GaN/Si SAW single resonators. Magnetostrictive elements (Ni and CoFeB) were deposited in the proximity of the interdigitated transducers (IDTs) of the resonators (A-type structures) and also over the IDTs, after covering them with a BCB layer to avoid short circuits with IDTs metal (B-type structures). This work targets emerging applications of SAW resonators in driving spin wave pumping and in coupling of surface acoustic waves (SAW) with superconducting Q-bits. Magnetic sensitivity of the SAWs was analyzed at room temperature (RT) and at cryogenic temperatures, obtaining high magnetic sensitivities at 16 K. According to our knowledge, GaN based SAWs are first time used in magnetic applications; also, cryogenic behavior of magnetic SAW sensors is first time analyzed.

cond-mat.mes-hall↗

2-input 4-output Programmable Spin Wave Logic Gate

To bring Spin Wave (SW) based computing paradigm into practice and develop ultra low power Magnonic circuits and computation platforms, one needs basic logic gates that operate and can be cascaded within the SW domain without requiring back and forth conversion between the SW and voltage domains. To achieve this, SW gates have to possess intrinsic fanout capabilities, be input-output data representation coherent, and reconfigurable. In this paper, we address the first and the last requirements and propose a novel 4-output programmable SW logic. First, we introduce the gate structure and demonstrate that, by adjusting the gate output detection method, it can parallelly evaluate any 4-element subset of the 2-input Boolean function set AND, NAND, OR, NOR, XOR, and XNOR. Furthermore, we adjust the structure such that all its 4 outputs produce SWs with the same energy and demonstrate that it can evaluate Boolean function sets while providing fanout capabilities ranging from 1 to 4. We validate our approach by instantiating and simulating different gate configurations such as 4-output AND/OR, 4-output XOR/XNOR, output energy balanced 4-output AND/OR, and output energy balanced 4-output XOR/XNOR by means of Object Oriented Micromagnetic Framework (OOMMF) simulations. Finally, we evaluate the performance of our proposal in terms of delay and energy consumption and compare it against existing state-of-the-art SW and 16nm CMOS counterparts. The results indicate that for the same functionality, our approach provides 3x and 16x energy reduction, when compared with conventional SW and 16nm CMOS implementations, respectively.

cond-mat.mes-hall↗

Spin Wave Based Full Adder

Spin Waves (SWs) propagate through magnetic waveguides and interfere with each other without consuming noticeable energy, which opens the road to new ultra-low energy circuit designs. In this paper we build upon SW features and propose a novel energy efficient Full Adder (FA) design consisting of The FA 1 Majority and 2 XOR gates, which outputs Sum and Carry-out are generated by means of threshold and phase detection, respectively. We validate our proposal by means of MuMax3 micromagnetic simulations and we evaluate and compare its performance with state-of-the-art SW, 22nm CMOS, Magnetic Tunnel Junction (MTJ), Spin Hall Effect (SHE), Domain Wall Motion (DWM), and Spin-CMOS implementations. Our evaluation indicates that the proposed SW FA consumes 22.5% and 43% less energy than the direct SW gate based and 22nm CMOS counterparts, respectively. Moreover it exhibits a more than 3 orders of magnitude smaller energy consumption when compared with state-of-the-art MTJ, SHE, DWM, and Spin-CMOS based FAs, and outperforms its contenders in terms of area by requiring at least 22% less chip real-estate.

cond-mat.mes-hall↗

Achieving Wave Pipelining in Spin Wave Technology

By their very nature, voltage/current excited Spin Waves (SWs) propagate through waveguides without consuming noticeable power. If SW excitation is performed by the continuous application of voltages/currents to the input, which is usually the case, the overall energy consumption is determined by the transducer power and the circuit critical path delay, which leads to high energy consumption because of SWs slowness. However, if transducers are operated in pulses the energy becomes circuit delay independent and it is mainly determined by the transducer power and delay, thus pulse operation should be targeted. In this paper, we utilize a 3-input Majority gate (MAJ) to investigate the Continuous Mode Operation (CMO), and Pulse Mode Operation (PMO). Moreover, we validate CMO and PMO 3-input Majority gate by means of micromagnetic simulations. Furthermore, we evaluate and compare the CMO and PMO Majority gate implementations in term of energy. The results indicate that PMO diminishes MAJ gate energy consumption by a factor of 18. In addition, we describe how PMO can open the road towards the utilization of the Wave Pipelining (WP) concept in SW circuits. We validate the WP concept by means of micromagnetic simulations and we evaluate its implications in term of throughput. Our evaluation indicates that for a circuit formed by four cascaded MAJ gates WP increases the throughput by 3.6x.

cond-mat.mes-hall↗