arXiv subjects

Dominic Waldhoer

Publications and source records attributed to Dominic Waldhoer.

6 recordsLinked to original sources

arXiv2026

Efficient Quantum-Mechanical Modeling of Nonradiative Charge Transfer Processes

Nonradiative charge transfer processes play a central role in a wide range of physical phenomena, including reliability phenomena in semiconductor devices such as bias temperature instability, hysteresis, random telegraph noise, and trap-assisted tunneling. nonradiative multiphonon (NMP) theory provides a physically rigorous framework for describing such charge transitions, but its full quantum-mechanical formulation is computationally too demanding for large-scale simulations. In this work, we present a systematic and implementation-oriented treatment of NMP-based models for practical large-scale simulations. Starting from the quantum-mechanical foundations of coupled electron--phonon dynamics, we derive computationally efficient approximations for charge capture and emission rates and clearly identify the underlying assumptions and validity regimes. In particular, we introduce an effective crossing-preserving approximation that yields fully analytic, numerically stable, and computationally inexpensive transition rates while retaining the essential quantum-mechanical physics. The resulting expressions are therefore well suited for large-scale device simulations, where capture coefficients must be evaluated repeatedly over broad multidimensional parameter spaces. Furthermore, we derive continuum formulations for transitions between localized defect states and extended electronic bands, enabling direct incorporation into semiconductor-device simulations. The resulting framework bridges microscopic defect physics and practical large-scale simulations of charge transfer processes in complex semiconductor devices. At the same time this work serves as a practical guide for implementing physically grounded NMP-based models, providing both a systematic derivation of the underlying theory and a clear guidance on the validity limits.

cond-mat.mtrl-sci↗

arXiv2025

Performance and reliability potential of Bi$_2$O$_2$Se/Bi$_2$SeO$_5$ transistors

While 2D materials have enormous potential for future device technologies, many challenges must be overcome before they can be deployed at an industrial scale. One of these challenges is identifying the right semiconductor/insulator combination that ensures high performance, stability, and reliability. In contrast to conventional 2D interfaces, which suffer from van der Waals gaps or covalent bonding issues, zippered structures such as the high-mobility 2D semiconductor Bi$_2$O$_2$Se and its native high-$κ$ oxide Bi$_2$SeO$_5$ offer high-quality interfaces, good scalability, and excellent device performance. While most prior work has focused mainly on basic device behavior, here we also thoroughly assess the stability and reliability of this material system using a multiscale approach that integrates electrical characterization, density functional theory, and TCAD simulations, linking atomistic states to device-scale reliability. By analyzing four transistor design generations (top-gated, fin, and two gate-all-around FETs), we provide realistic predictions for how this system performs at the ultimate scaling limit. We identify oxygen-related defects in the oxide as the main contributors to hysteresis and recoverable threshold shifts, and we propose mitigation strategies through encapsulation or oxygen-rich annealing. Benchmarking the extracted material parameters against IRDS 2037 requirements, we demonstrate that Bi$_2$O$_2$Se/Bi$_2$SeO$_5$ transistors can achieve high drain and low gate currents at ultra-scaled conditions. These findings position this material system as a technologically credible and manufacturing-relevant pathway for future nanoelectronics.

cond-mat.mtrl-sci↗

arXiv2025

Hysteresis Measurements as a Diagnostic Tool: A Systematic Approach for Stability Benchmarking and Performance Projection of 2D-Materials-Based MOSFETs

Judging by its omnipresence in the literature, the hysteresis observed in the transfer characteristics of emerging transistors based on 2D-materials is widely accepted as an important metric related to the device quality. The hysteresis is often reported with attributes like "negligible" or "small" without giving any specifics as to how this was determined and against what reference the measured values were compared to. Quite surprisingly, there appears to be only a fragmentary understanding of the mechanisms actually contributing to hysteresis and the sensitivity of the actual measurement on various experimental parameters. We attempt to close this gap by first providing a comprehensive theoretical analysis of the dominant mechanisms contributing to hysteresis: charge trapping by defects from the channel or the gate, the drift of mobile charges, and eventually ferroelectricity. We continue by suggesting methods to experimentally distinguishing between these phenomena. Based on these discussions it becomes clear that previously reported hysteresis values have little meaning as they have been non-systematically recorded under arbitrary conditions. In order to resolve this predicament, we propose a standardized hysteresis measurement scheme to establish the hysteresis as a comparable metric for the assessment of device stability. Our standardized scheme ensures that hysteresis data can be effectively compared across different technologies and, most importantly, provide a means to extrapolate data obtained on thicker prototypes to subnanometer equivalent oxide thicknesses. This facilitates the systematic benchmarking of insulator/channel combinations in terms of stability, which thereby enables the screening of material systems for more stable and reliable 2D-material-based MOSFETs.

physics.app-ph↗

arXiv2025

How to Identify Suitable Gate Dielectrics for Transistors based on Two-Dimensional Semiconductors

The recent progress in nanosheet transistors has established two-dimensional (2D) semiconductors as viable candidates for future ultra-scaled electronic devices. Next to reducing contact resistance, identifying good gate dielectrics is a fundamental challenge, as the dielectric/channel interface dramatically impacts virtually all performance parameters. While several promising gate dielectrics have recently been reported, the evaluation of their quality and suitability is often fragmentary and focused on selected important performance metrics of the gate stack, such as the capacitive gate control, leakage currents, reliability, and ease of fabrication and integration. However, identifying a suitable gate stack is a complex problem that has not yet been approached systematically. In this perspective, we aim to formulate general criteria for good gate dielectrics.

physics.app-ph↗

arXiv2025

Influence of the Effective Mass on ab initio Phonon-limited Electron Mobility of GaAs

We present a comprehensive ab initio study of the influence of band structure corrections, particularly the electron effective mass, on the phonon-limited electron drift and Hall mobilities of GaAs. Our approach is based on the DFT+$U$ method, combined with an iterative solution of the linearized Boltzmann transport equation using the Wannier interpolation technique. We show how this framework allows for accurate refinements of the electronic band structure and phonon dispersion, leading to improved predictions for transport properties. In particular, by varying the Hubbard parameters to purposefully tune the conduction band features, allowing us to reproduce bands with different electron effective mass, we systematically investigate the relationship between mobility and effective mass. In this context, our results show close agreement with semi-empirical relations that follow a power-law dependence. Moreover, this approach can be used to indirectly incorporate temperature effects into the band structure, enabling efficient evaluation of temperature-dependent electron mobilities. Our mobility results exhibit good agreement with experimental data and are comparable to previously reported values obtained using the computationally expensive GW method.

cond-mat.mtrl-sci↗

arXiv2022

Comphy v3.0 -- A Compact-Physics Framework for Modeling Charge Trapping Related Reliability Phenomena in MOS Devices

Charge trapping plays an important role for the reliability of electronic devices and manifests itself in various phenomena like bias temperature instability (BTI), random telegraph noise (RTN), hysteresis or trap-assisted tunneling (TAT). In this work we present Comphy v3.0, an open source physical framework for modeling these effects in a unified fashion using nonradiative multiphonon theory on a one-dimensional device geometry. Here we give an overview about the underlying theory, discuss newly introduced features compared to the original Comphy framework and also review recent advances in reliability physics enabled by these new features. The usefulness of Comphy v3.0 for the reliability community is highlighted by several practical examples including automatic extraction of defect distributions, modeling of TAT in high-k capacitors and BTI/RTN modeling at cryogenic temperatures.

physics.app-ph↗