arXiv subjects

Edoardo Charbon

Publications and source records attributed to Edoardo Charbon.

At least 73 records · Page 4Linked to original sources

arXiv2021

Integrated multiplexed microwave readout of silicon quantum dots in a cryogenic CMOS chip

Solid-state quantum computers require classical electronics to control and readout individual qubits and to enable fast classical data processing [1-3]. Integrating both subsystems at deep cryogenic temperatures [4], where solid-state quantum processors operate best, may solve some major scaling challenges, such as system size and input/output (I/O) data management [5]. Spin qubits in silicon quantum dots (QDs) could be monolithically integrated with complementary metal-oxide-semiconductor (CMOS) electronics using very-large-scale integration (VLSI) and thus leveraging over wide manufacturing experience in the semiconductor industry [6]. However, experimental demonstrations of integration using industrial CMOS at mK temperatures are still in their infancy. Here we present a cryogenic integrated circuit (IC) fabricated using industrial CMOS technology that hosts three key ingredients of a silicon-based quantum processor: QD arrays (arranged here in a non-interacting 3x3 configuration), digital electronics to minimize control lines using row-column addressing and analog LC resonators for multiplexed readout, all operating at 50 mK. With the microwave resonators (6-8 GHz range), we show dispersive readout of the charge state of the QDs and perform combined time- and frequency-domain multiplexing, enabling scalable readout while reducing the overall chip footprint. This modular architecture probes the limits towards the realization of a large-scale silicon quantum computer integrating quantum and classical electronics using industrial CMOS technology.

quant-ph↗

arXiv2020

CMOS-based cryogenic control of silicon quantum circuits

The most promising quantum algorithms require quantum processors hosting millions of quantum bits when targeting practical applications. A major challenge towards large-scale quantum computation is the interconnect complexity. In current solid-state qubit implementations, a major bottleneck appears between the quantum chip in a dilution refrigerator and the room temperature electronics. Advanced lithography supports the fabrication of both CMOS control electronics and qubits in silicon. When the electronics are designed to operate at cryogenic temperatures, it can ultimately be integrated with the qubits on the same die or package, overcoming the wiring bottleneck. Here we report a cryogenic CMOS control chip operating at 3K, which outputs tailored microwave bursts to drive silicon quantum bits cooled to 20mK. We first benchmark the control chip and find electrical performance consistent with 99.99% fidelity qubit operations, assuming ideal qubits. Next, we use it to coherently control actual silicon spin qubits and find that the cryogenic control chip achieves the same fidelity as commercial instruments. Furthermore, we highlight the extensive capabilities of the control chip by programming a number of benchmarking protocols as well as the Deutsch-Josza algorithm on a two-qubit quantum processor. These results open up the path towards a fully integrated, scalable silicon-based quantum computer.

quant-ph↗

arXiv2020

Quantum illumination imaging with a single-photon avalanche diode camera

Single-photon-avalanche diode (SPAD) arrays are essential tools in biophotonics, optical ranging and sensing and quantum optics. However, their small number of pixels, low quantum efficiency and small fill factor have so far hindered their use for practical imaging applications. Here, we demonstrate full-field entangled photon pair correlation imaging using a 100-kpixels SPAD camera. By measuring photon coincidences between more than 500 million pairs of positions, we retrieve the full point spread function of the imaging system and subsequently high-resolution images of target objects illuminated by spatially entangled photon pairs. We show that our imaging approach is robust against stray light, enabling quantum imaging technologies to move beyond laboratory experiments towards real-world applications such as quantum LiDAR.

quant-ph↗

arXiv2020

Superluminal Motion-Assisted 4-Dimensional Light-in-Flight Imaging

Advances in high speed imaging techniques have opened new possibilities for capturing ultrafast phenomena such as light propagation in air or through media. Capturing light-in-flight in 3-dimensional xyt-space has been reported based on various types of imaging systems, whereas reconstruction of light-in-flight information in the fourth dimension z has been a challenge. We demonstrate the first 4-dimensional light-in-flight imaging based on the observation of a superluminal motion captured by a new time-gated megapixel single-photon avalanche diode camera. A high resolution light-in-flight video is generated with no laser scanning, camera translation, interpolation, nor dark noise subtraction. A machine learning technique is applied to analyze the measured spatio-temporal data set. A theoretical formula is introduced to perform least-square regression, and extra-dimensional information is recovered without prior knowledge. The algorithm relies on the mathematical formulation equivalent to the superluminal motion in astrophysics, which is scaled by a factor of a quadrillionth. The reconstructed light-in-flight trajectory shows a good agreement with the actual geometry of the light path. Our approach could potentially provide novel functionalities to high speed imaging applications such as non-line-of-sight imaging and time-resolved optical tomography.

physics.optics↗

arXiv2020

Quanta Burst Photography

Single-photon avalanche diodes (SPADs) are an emerging sensor technology capable of detecting individual incident photons, and capturing their time-of-arrival with high timing precision. While these sensors were limited to single-pixel or low-resolution devices in the past, recently, large (up to 1 MPixel) SPAD arrays have been developed. These single-photon cameras (SPCs) are capable of capturing high-speed sequences of binary single-photon images with no read noise. We present quanta burst photography, a computational photography technique that leverages SPCs as passive imaging devices for photography in challenging conditions, including ultra low-light and fast motion. Inspired by recent success of conventional burst photography, we design algorithms that align and merge binary sequences captured by SPCs into intensity images with minimal motion blur and artifacts, high signal-to-noise ratio (SNR), and high dynamic range. We theoretically analyze the SNR and dynamic range of quanta burst photography, and identify the imaging regimes where it provides significant benefits. We demonstrate, via a recently developed SPAD array, that the proposed method is able to generate high-quality images for scenes with challenging lighting, complex geometries, high dynamic range and moving objects. With the ongoing development of SPAD arrays, we envision quanta burst photography finding applications in both consumer and scientific photography.

cs.CV↗

arXiv2020

Quantum Transport in 40-nm MOSFETs at Deep-Cryogenic Temperatures

In this letter, we characterize the electrical properties of commercial bulk 40-nm MOSFETs at room and deep cryogenic temperatures, with a focus on quantum information processing (QIP) applications. At 50 mK, the devices operate as classical FETs or quantum dot devices when either a high or low drain bias is applied, respectively. The operation in classical regime shows improved transconductance and subthreshold slope with respect to 300 K. In the quantum regime, all measured devices show Coulomb blockade. This is explained by the formation of quantum dots in the channel, for which a model is proposed. The variability in parameters, important for quantum computing scaling, is also quantified. Our results show that bulk 40-nm node MOSFETs can be readily used for the co-integration of cryo-CMOS classical-quantum circuits at deep cryogenic temperatures and that the variability approaches the uniformity requirements to enable shared control.

physics.app-ph↗

arXiv2019

A megapixel time-gated SPAD image sensor for 2D and 3D imaging applications

We present the first 1Mpixel SPAD camera ever reported. The camera features 3.8ns time gating and 24kfps frame rate; it was fabricated in 180nm CIS technology. Two pixels have been designed with a pitch of 9.4$μ$m in 7T and 5.75T configurations, respectively, achieving a maximum fill factor of 13.4%. The maximum PDP is 27%, median DCR 2.0cps, variation in gating length 120ps, position skew 410ps, and rise/fall time <550ps, all FWHM at 3.3V of excess bias. The sensor was used to capture 2D/3D scenes over 2m with an LSB of 5.4mm and a precision better than 7.8mm. Extended dynamic range is demonstrated in dual exposure operation mode. Spatially overlapped multi-object detection is experimentally demonstrated in single-photon time-gated ToF for the first time.

eess.IV↗

arXiv2019

Characterization and Analysis of On-Chip Microwave Passive Components at Cryogenic Temperatures

This paper presents the characterization of microwave passive components, including metal-oxide-metal (MoM) capacitors, transformers, and resonators, at deep cryogenic temperature (4.2 K). The variations in capacitance, inductance and quality factor are explained in relation to the temperature dependence of the physical parameters and the resulting insights on modeling of passives at cryogenic temperatures are provided. Both characterization and modeling, reported for the first time down to 4.2 K, are essential in designing cryogenic CMOS radio-frequency integrated circuits, a promising candidate to build the electronic interface for scalable quantum computers.

physics.app-ph↗

arXiv2019

Efficient random number generation techniques for CMOS SPAD array based devices

This work presents new techniques to produce true random bits by exploiting single photon time of arrival. Two FPGA-based QRNG devices are presented: Randy which uses one discrete SPAD and LinoSPAD which uses a CMOS SPAD array, along with a time-to-digital converter (TDC). Post-processing procedures are explained in order to extract randomness taking care of SPAD and TDC non-idealities. These procedures are based on the application of Peres [Y. Peres, Ann. Statist.20, 590 (1992)] and Zhou-Bruk [H. Zhou and J. Bruck, arXiv:1209.0726 (2012)] extraction algorithms. Achieved generation rates are 1.8 Mbit/s for Randy device and 310 Mbit/s for LinoSPAD device. Randy QRNG also features a real time procedure which was used for the realization of fundamental tests of physics.

quant-ph↗

arXiv2019

Quantum correlation measurement with single photon avalanche diode arrays

Temporal photon correlation measurement, instrumental to probing the quantum properties of light, typically requires multiple single photon detectors. Progress in single photon avalanche diode (SPAD) array technology highlights their potential as high performance detector arrays for quantum imaging and photon number resolving (PNR) experiments. Here, we demonstrate this potential by incorporating a novel on-chip SPAD array with 55% peak photon detection probability, low dark count rate and crosstalk probability of 0.14% per detection, in a confocal microscope. This enables reliable measurements of second and third order photon correlations from a single quantum dot emitter. Our analysis overcomes the inter-detector optical crosstalk background even though it is over an order of magnitude larger than our faint signal. To showcase the vast application space of such an approach, we implement a recently introduced super-resolution imaging method, quantum image scanning microscopy (Q-ISM).

physics.optics↗

arXiv2019

A Bit Too Much? High Speed Imaging from Sparse Photon Counts

Recent advances in photographic sensing technologies have made it possible to achieve light detection in terms of a single photon. Photon counting sensors are being increasingly used in many diverse applications. We address the problem of jointly recovering spatial and temporal scene radiance from very few photon counts. Our ConvNet-based scheme effectively combines spatial and temporal information present in measurements to reduce noise. We demonstrate that using our method one can acquire videos at a high frame rate and still achieve good quality signal-to-noise ratio. Experiments show that the proposed scheme performs quite well in different challenging scenarios while the existing approaches are unable to handle them.

cs.CV↗

arXiv2019

Single-photon SPAD imagers in biophotonics: Review and Outlook

Single-photon avalanche diode (SPAD) arrays are solid-state detectors offering imaging capabilities at the level of individual photons, with unparalleled photon counting and time-resolved performance. This fascinating technology has progressed at very high pace in the past 15~years, since its inception in standard CMOS technology in 2003. A host of architectures has been explored, ranging from simpler implementations, based solely on off-chip data processing, to progressively ``smarter" sensors including on-chip, or even pixel-level, timestamping and processing capabilities. As the technology matured, a range of biophotonics applications has been explored, including (endoscopic) FLIM, (multi-beam multiphoton) FLIM-FRET, SPIM-FCS, super-resolution microscopy, time-resolved Raman, NIROT, and PET. We will review some representative sensors and their corresponding applications, including the most relevant challenges faced by chip designers and end-users. Finally, we will provide an outlook on the future of this fascinating technology.

physics.ins-det↗

arXiv2019

The electronic interface for quantum processors

Quantum computers can potentially provide an unprecedented speed-up with respect to traditional computers. However, a significant increase in the number of quantum bits (qubits) and their performance is required to demonstrate such quantum supremacy. While scaling up the underlying quantum processor is extremely challenging, building the electronics required to interface such large-scale processor is just as relevant and arduous. This paper discusses the challenges in designing a scalable electronic interface for quantum processors. To that end, we discuss the requirements dictated by different qubit technologies and present existing implementations of the electronic interface. The limitations in scaling up such state-of-the-art implementations are analyzed, and possible solutions to overcome those hurdles are reviewed. The benefits offered by operating the electronic interface at cryogenic temperatures in close proximity to the low-temperature qubits are discussed. Although several significant challenges must still be faced by researchers in the field of cryogenic control for quantum processors, a cryogenic electronic interface appears the viable solution to enable large-scale quantum computers able to address world-changing computational problems.

quant-ph↗

arXiv2018

The impact of classical control electronics on qubit fidelity

Quantum processors rely on classical electronic controllers to manipulate and read out the quantum state. As the performance of the quantum processor improves, non-idealities in the classical controller can become the performance bottleneck for the whole quantum computer. To prevent such limitation, this paper presents a systematic study of the impact of the classical electrical signals on the qubit fidelity. All operations, i.e. single-qubit rotations, two-qubit gates and read-out, are considered, in the presence of errors in the control electronics, such as static, dynamic, systematic and random errors. Although the presented study could be extended to any qubit technology, it currently focuses on single-electron spin qubits, because of several advantages, such as purely electrical control and long coherence times, and for their potential for large-scale integration. As a result of this study, detailed electrical specifications for the classical control electronics for a given qubit fidelity can be derived, as demonstrated with specific case studies. We also discuss the effect on qubit fidelity of the performance of the general-purpose room-temperature equipment that is typically employed to control the few qubits available today. Ultimately, we show that tailor-made electronic controllers can achieve significantly lower power, cost and size, as required to support the scaling up of quantum computers.

quant-ph↗

arXiv2017

FPGA Design Techniques for Stable Cryogenic Operation

In this paper we show how a deep-submicron FPGA can be modified to operate at extremely low temperatures through modifications in the supporting hardware and in the firmware programming it. Though FPGAs are not designed to operate at a few Kelvin, it is possible to do so on virtue of the extremely high doping levels found in deep-submicron CMOS technology nodes. First, any PCB component, that does not conform with this requirement, is removed. Both the majority of decoupling capacitor types and voltage regulators are not well behaved at cryogenic temperatures, asking for an ad-hoc solution to stabilize the FPGA supply voltage, especially for sensitive applications. Therefore, we have designed a firmware that enforces a constant power consumption, so as to stabilize the supply voltage in the interior of the FPGA chip. The FPGA is powered with a supply at several meters distance, causing significant IR drop and thus fluctuations on the local supply voltage. To achieve the stabilization, the variation in digital logic speed, which directly corresponds to changes in supply voltage, is constantly measured and corrected for through a tunable oscillator farm, implemented on the FPGA. The method is versatile and robust, enabling seamless porting to other FPGA families and configurations.

physics.ins-det↗

arXiv2017

CubeSat quantum communications mission

Quantum communication is a prime space technology application and offers near-term possibilities for long-distance quantum key distribution (QKD) and experimental tests of quantum entanglement. However, there exists considerable developmental risks and subsequent costs and time required to raise the technological readiness level of terrestrial quantum technologies and to adapt them for space operations. The small-space revolution is a promising route by which synergistic advances in miniaturization of both satellite systems and quantum technologies can be combined to leap-frog conventional space systems development. Here, we outline a recent proposal to perform orbit-to-ground transmission of entanglement and QKD using a CubeSat platform deployed from the International Space Station (ISS). This ambitious mission exploits advances in nanosatellite attitude determination and control systems (ADCS), miniaturised target acquisition and tracking sensors, compact and robust sources of single and entangled photons, and high-speed classical communications systems, all to be incorporated within a 10 kg 6 litre mass-volume envelope. The CubeSat Quantum Communications Mission (CQuCoM) would be a pathfinder for advanced nanosatellite payloads and operations, and would establish the basis for a constellation of low-Earth orbit trusted-nodes for QKD service provision.

quant-ph↗

arXiv2017

A Reconfigurable Cryogenic Platform for the Classical Control of Scalable Quantum Computers

Recent advances in solid-state qubit technology are paving the way to fault-tolerant quantum computing systems. However, qubit technology is limited by qubit coherence time and by the complexity of coupling the quantum system with a classical electronic infrastructure. We propose an infrastructure, enabling to read and control qubits, that is implemented on a field-programmable gate array (FPGA). The FPGA platform supports functionality required by several qubit technologies and can operate physically close to the qubits over a temperature range from 4K to 300K. Extensive characterization of the platform over this temperature range revealed all major components (such as LUTs, MMCM, PLL, BRAM, IDELAY2) operate correctly and the logic speed is very stable. The stability is finally concretized by operating an integrated ADC with relatively stable performance over temperature.

physics.ins-det↗

arXiv2017

Quantum information density scaling and qubit operation time constraints of CMOS silicon based quantum computer architectures

Even the quantum simulation of simple molecules such as Fe$_2$S$_2$ requires more than 10$^6$ qubits. In order to assess such a multimillion scale of identical qubits and control lines, the silicon platform seems to be one of the most indicated routes as it provides the capability of nanometric, serial and industrial quality fabrication. The maximum amount of quantum information per unit surface and the consequent space constraints on qubit operations are key parameters towards fault-tolerant quantum information processing (QIP) with Si qubits. Such maximum density of quantum information is expressed for the compact exchange-only Si double quantum dot qubit architecture as a function of the CMOS technology node. The size scale optimizing both physical qubit operation time and quantum error correction (QEC) requirements is assessed by reviewing the physical and technological constraints. We determine the workable operation frequency range of a Si-CMOS quantum processor to be within 1 and 100 GHz, which limits its feasibility only to the most advanced nodes. The compatibility with classical control circuitry is discussed, focusing on the cryogenic CMOS operation required to bring the classical controller as close as possible to the quantum processor and to enable interfacing thousands of qubits on the same chip. The operation time range prospected for cryogenic control electronics is found to be compatible with the qubit operation time. By combining the forecast of technology development with operation time and classical circuitry constraints, we derive a maximum quantum information density for logical qubits of 2.8 and 4 Mqb/cm$^2$ for the 10-nm and 7-nm technology nodes respectively for the Steane code. The density is one and two orders of magnitude less for surface and concatenated codes respectively. Such values provide a benchmark for the development of Si-based fault tolerant QIP.

quant-ph↗