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Firooz Aflatouni

Publications and source records attributed to Firooz Aflatouni.

15 recordsLinked to original sources

A Scalable All-to-All Reconfigurable Ising Solver Using Pulsed Time-Division Multiplexing

Physics-based computing platforms, such as those based on the Ising model, are an important pillar of future hardware systems built for the artificial intelligence (AI) era. Such platforms show promise for solving nondeterministic polynomial (NP) time problems that are difficult for traditional processing units to solve efficiently as problem size grows. Here, we present a scalable optoelectronic Ising machine architecture, demonstrated with 64 all-to-all connected spins using pulsed time-division multiplexing. The 65 nm CMOS Ising chip integrates the coupling and nonlinear mechanisms in an active area of 3.1 mm2, eliminating the need for benchtop equipment within the loop. The feedback loop of the Ising machine is closed using a compact high-bandwidth, low-loss optical fiber, seamlessly combining optical scalability with the ultradense reconfigurability of integrated electronics. The chip operates at 1 GHz with 4-bit coupling weights and is benchmarked with NP-complete Boolean satisfiability problems consisting of three literals (3-SAT) and clause-to-variable ratios of 32/32, 40/24, and 48/16. Nanosecond annealing times represent at least a three order-of-magnitude improvement over previously reported all-to-all connected works. Time and energy to solutions for 100% 3-SAT clause accuracy are as low as 7.4 us and 2.9 uJ, respectively, achieving more than an order-of-magnitude decrease in time and energy to solution compared to the state of the art. All-to-all connection is demonstrated using MaxCut problems with 100% graph densities. The chip's ability to effectively solve 2-, 3-SAT, and MaxCut problems highlights its reconfigurability and versatility. Furthermore, combining mature CMOS integration with scalable photonic links allows for significant reduction in computation time and energy, addressing the pressing requirements of AI and future hyperscale datacenters.

physics.optics

Single-Chip 1.024 Tb/s Optical Receiver for High-Speed Optical links

Integrated optical transceivers, utilizing wavelength-division-multiplexing, offer a path forward for implementation of compact, high-bandwidth and energy-efficient interconnects for future data centers. Here we report the demonstration of a monolithically integrated optical receiver in 45nm CMOS, where efficient multi-layer optical demultiplexing with capacitive tuning, energy efficient electronics and wideband inverse designed grating couplers enable implementation of a 32-channel receiver chip based on wavelength-division multiplexing. The chip operates at an aggregate data-rate of 1.024 Tb/s with all channels operating simultaneously at a data-rate of 32 Gb/s/channel achieving a record energy efficiency of 71 fJ/b, including the power consumption of both the electronic circuitry and the tuning and control of photonic devices, and a record bandwidth density of 4 Tb/s/mm2. The receiver achieves a bit-error-rate below 1E-12 without requiring equalization, error correction or digital processing. Inverse-designed broadband grating couplers provide efficient, low-loss optical coupling into the chip. An on-chip demultiplexer, composed of Mach-Zehnder interferometers (MZIs) and ring resonators, offers a large channel-to-channel isolation sufficient for error-free operation. Capacitive phase shifters embedded within the ring resonators of the demultiplexer are used for wavelength alignment at a zero static power consumption. MZIs and ring-resonators are periodically selected and autonomously locked to the wavelength of the corresponding optical carrier. The implemented monolithic receiver offers a scalable, energy-efficient and reliable solution for the beyond Tb/s optical interconnects.

physics.optics

Kirigami Film Reflector for Deployable Space Antennas

We propose a low-pretension reflective kirigami film as a material for the reflective surfaces of large deployable space reflector antennas with an operating frequency around 10 GHz. The kirigami cut pattern is based on the well-known rotating squares pattern but is augmented with diagonal cuts to enhance stretchability and allow control over the effective Poisson's ratio. Using finite element simulations, we analyzed how the geometric parameters of this pattern affected the reflectance of the film and the pretension required to resist thermal deformations. Tensile testing of selected designs, which are approximately half the weight of traditional metallic meshes, demonstrated a substantial reduction in the needed pretension to ~0.5 N/m and as low as ~0.1 N/m. Such low pretension represents an order-of-magnitude improvement over traditional metallic mesh reflectors and could enable the use of lighter antenna trusses. Free-space reflectance measurements also show that these perforated films can maintain power reflectance exceeding 90% at 10 GHz under the strains expected in the deployed configuration.

physics.app-ph

Single chip 1 Tb/s optical transmitter with inverse designed input and output couplers

Optical interconnects are essential for data centers and AI systems. Given the limited energy production, ultra-low energy and dense optical interconnects are required to support the exponential growth of AI systems. Here we report the demonstration of a monolithically integrated optical transmitter where use of power efficient architecture and devices such as capacitive tuning of optical structures at zero static power consumption and efficient and wideband inverse designed grating couplers enable implementation of a 32-channel transmitter chip based on wavelength-division multiplexing achieving a record modulation energy efficiency of 32 fJ/b at 5 Gb/s/channel and 106 fJ/b at 32 Gb/s/channel, which includes the tuning of optical devices. Furthermore, a bit-error-rate of 1E-12 was achieved, while all channels are simultaneously operating with an aggregate data-rate of 1.024 Tb/s. The system utilizes 16 carrier wavelengths in the optical C band. The pseudo-random-bit-streams are electrically generated on-chip and used to drive individually wavelength-stabilized 2-section p-n-capacitive micro-ring modulators using integrated energy-efficient high-swing electrical drivers. The low-loss inverse designed grating couplers have -1-dB bandwidth of 25 nm. The chip concurrently achieves the highest aggregate data-rate, the highest energy efficiency and the highest bandwidth density for a multi-channel high date-rate optical transmitter chip reported to date.

physics.optics

A Kerr soliton Ising machine for combinatorial optimization problems

The growing challenges of scaling digital computing motivate new approaches, especially through the dynamical evolution of physical systems that mimic neural networks and combinatorial optimization problems. While light is a hyper efficient information carrier, intrinsically weak light interactions make direct information processing difficult to implement. Recently, specialized nonlinear photonics have opened new controls over light fields with extraordinary bandwidth, coherence, and the emergence of strong interactions among nonlinear eigenstates like solitons. We harness an ensemble of hundreds of Kerr-nonlinear microresonator solitons and implement an analog feedback network to create an Ising machine with fully programmable all-to-all interactions. By increasing the feedback for self, on-diagonal interactions, each soliton exhibits a universal spin-like bifurcation. Using this palette of interactions amongst the entire soliton ensemble, we encode the Ising machine to solve the benchmark Boolean satisfiability problem (SAT). The combination of uniform soliton interactions and the compatibility of our Ising machine with high-speed data interconnects enables rapid and precise solutions of complex SAT problems. Indeed, the soliton properties bound the tradeoff of optical power and time use by the machine at approximately 10 mW and 1 $\mu$s for a single feedback step. We performed >10,000 trials on more than 100 randomly generated SAT instances to evaluate the Ising machine, demonstrating the potential to exceed the performance of benchmark digital SAT solvers. Our work highlights the convergence of optical nonlinearity, ultralow loss photonics, and optoelectronic circuits, which can be combined for a wide range of computation-acceleration tasks.

physics.optics

High-density and scalable graphene Hall sensor arrays through monolithic CMOS integration

Electronic devices made from two-dimensional materials (2DMs) significantly outperform their silicon counterparts; however, silicon CMOS technology remains commercially predominant as it offers the capability to operate dense arrays of devices in a scalable fashion. In particular, graphene Hall sensors (GHSs) offer great improvements in magnetic field sensitivity and resolution compared to silicon Hall-effect sensors, making them extremely appealing for magnetic field imaging and biosensing. At present, GHS arrays have limited scalability compared to silicon CMOS since they require planar routing for biasing and multiplexing. In this work, we explore strategies to realize high-density graphene Hall sensor arrays by vertically connecting GHSs with silicon CMOS biasing and multiplexing circuitry, allowing the routing and circuitry to scale with the array. We investigate the importance of design choices in the chip layout and post-fabrication process in maximizing the reliability of graphene transfer onto mm-scale CMOS dies. Our experimental results validate the success of the integration process by showing for the first time that GHSs can be monolithically integrated with CMOS with high yield to form sensor arrays. We expect that these results will lead to further improvements in magnetic sensing technology and broader advancements in large-scale heterogeneous 2DM-CMOS systems.

physics.ins-det

A single chip 1.024 Tb/s silicon photonics PAM4 receiver

Energy-efficient high-bandwidth interconnects play a key role in computing systems. Advances in silicon photonic electro-optic modulators and wavelength selective components have enabled the utilization of wavelength-division-multiplexing (WDM) in integrated optical transceivers, offering a high data-rate operation while achieving enhanced energy efficiency, bandwidth density, scalability, and the reach required for data-centers. Here, we report the demonstration of a single chip optical WDM PAM4 receiver, where by co-integration of a 32-channel optical demultiplexer (O-DeMux) with autonomous wavelength tuning and locking at a near-zero power consumption and a 32-channel ultra-low power concurrent electrical detection system, a record chip energy efficiency of under 0.38 pJ/bit is measured. The implemented 32 channel monolithic WDM optical receiver chip achieves an end-to-end latency of under 100 ps and a bit-error-rate of less than 10-12 with no equalization, pre-distortion, or digital-signal-processing, while operating at 1.024 Tb/s aggregate data-rate on a single input fiber, the largest reported data-rate for a WDM PAM4 receiver chip to date. The receiver bandwidth density of more than 3.55 Tb/s/mm2 corresponds to more than an order-of-magnitude larger bandwidth density-energy efficiency product compared to the state-of-the-art optical PAM4 receivers for beyond 100Gb/s links. The chip, integrated using GlobalFoundries 45CLO CMOS-photonic process, can be used for implementation of energy-efficient high data-rate optical links for AI applications.

physics.optics

Electronic Noise Considerations for Designing Integrated Solid-State Quantum Memories

As quantum networks expand and are deployed outside research laboratories, a need arises to design and integrate compact control electronics for each memory node. It is essential to understand the performance requirements for such systems, especially concerning tolerable levels of noise, since these specifications dramatically affect a system's design complexity and cost. Here, using an approach that can be easily generalized across quantum-hardware platforms, we present a case study based on nitrogen-vacancy (NV) centers in diamond. We model and experimentally verify the effects of phase noise and timing jitter in the control system in conjunction with the spin qubit's environmental noise. We further consider the impact of different phase noise characteristics on the fidelity of dynamical decoupling sequences. The results demonstrate a procedure to specify design requirements for integrated quantum control signal generators for solid-state spin qubits, depending on their coherence time, intrinsic noise spectrum, and required fidelity.

quant-ph

A compact scalable phase modulator with zero static power consumption for visible integrated photonics

Optical modulators in the visible regime have far-reaching applications from biophotonics to quantum science. Implementations of such optical phase modulators on a complementary metal-oxide-semiconductor (CMOS) compatible platform have been mainly limited to utilization of the thermo-optic effect, liquid crystal technology, as well as piezo-optomechanical effects. Despite excellent performance, the demonstrations using the thermo-optic effect and liquid crystal technology both suffer from limited modulation speed. Moreover, the demonstrations utilizing piezo-optomechanical effects, require very large footprints due to a weak modulation efficiency. Here, we report the demonstration of the first highly scalable compact CMOS-compatible phase modulator in the visible regime based on altering the refractive index of an indium-tin oxide capacitive stack over a Si${_3}$N${_4}$ waveguide through the charge accumulation effect. The implemented modulator achieves a two orders-of-magnitude larger bandwidth compared to thermo-optic and liquid crystal based counterparts and close to 3 orders-of-magnitude higher modulation efficiency with about two orders-of-magnitude smaller footprint compared to piezo-optomechanical modulators. The 50 ${\mu}$m long phase modulator achieves a modulation efficiency, V$_{\pi}$L, of 0.06 V$.$cm at a zero static power consumption and a 31 MHz bandwidth at 637.9 nm.

physics.optics

A reconfigurable non-linear active metasurface for coherent wave down-conversion

Metasurfaces can manipulate the amplitude and phase of electromagnetic waves, offering applications ranging from antenna design and cloaking to imaging and communication. Additionally, temporal, and non-linear metasurfaces have the potential to adjust the frequency of impinging waves, driving advancements in frequency conversion, sensing, and quantum systems. Here, we report the demonstration of a non-linear active electronic-photonic metasurface that transfers information from an impinging optical wave to a millimeter-wave (mm-wave) beam. The proof-of-concept metasurface is designed to radiate a steerable 28GHz beam when illuminated with an optical wave at 193THz and consists of optically synchronized electronic-photonic chips tiled on a printed circuit board containing a microstrip patch antenna array. Input light, modulated with a data-encoded mm-wave carrier, is coupled into electronic-photonic chips using microlenses. Within each chip, the mm-wave signal is detected, phase-adjusted, amplified, and routed to an off-chip antenna. Beam-steering over a range of 60$^{\circ}$ in elevation and azimuth and data transmission at 2Gb/s over a fiber-wireless link is demonstrated. Free-space optical synchronization can significantly reduce the complexity of large-scale metasurfaces composed of non-uniform or randomly placed elements, is compatible with scalable architectures, and facilitates data transfer and mm-wave beam shaping, allowing for large-scale high-bandwidth and energy-efficient links with reduced complexity for the next generation communication, computation, sensing and quantum systems.

eess.SP

Wideband, Efficient AlScN-Si Acousto-Optic Modulator in a Commercially Available Silicon Photonics Process

Acousto-optic integration offers numerous applications including low-loss microwave signal processing, nonreciprocal light propagation, frequency comb generation, and broadband acousto-optic modulation. State-of-the-art acousto-optic systems are mainly implemented entirely using in-house fabrication processes, which despite excellent performance typically suffer from low yield and are not compatible with mass production through foundry processes. Here, we demonstrate a highly efficient wideband acousto-optic modulator (AOM) implemented on a silicon photonics foundry process enabling high-yield low-cost mass production of AOMs with other photonic and electronic devices on the same substrate. In the reported structure, a 150 $μ$m long AlScN-based acoustic transducer launches surface acoustic waves (SAW), which modulate the light passing through a silicon optical waveguide. A modulation efficiency of -18.3 dB over a bandwidth of 112 MHz is achieved, which to our knowledge is the highest reported efficiency and bandwidth combination among silicon based AOMs, resulting in about an order of magnitude $BW(V_πL)^{-1}$ figure-of-merit improvement compared to the state-of-the-art CMOS compatible AOMs. The monolithically integrated acousto-optic platform developed in this work will pave the way for low-cost, miniature microwave filters, true time delays, frequency combs, and other signal processors with the advanced functionality offered by foundry-integrated photonic circuits.

physics.optics

Frequency Tunable Magnetostatic Wave Filters With Zero Static Power Magnetic Biasing Circuitry

A single tunable filter simplifies complexity, reduces insertion loss, and minimizes size compared to frequency switchable filter banks commonly used for radio frequency (RF) band selection. Magnetostatic wave (MSW) filters stand out for their wide, continuous frequency tuning and high-quality factor. However, MSW filters employing electromagnets for tuning consume excessive power and space, unsuitable for consumer wireless applications. Here, we demonstrate miniature and high selectivity MSW tunable filters with zero static power consumption, occupying less than 2 cc. The center frequency is continuously tunable from 3.4 GHz to 11.1 GHz via current pulses of sub-millisecond duration applied to a small and nonvolatile magnetic bias assembly. This assembly is limited in the area over which it can achieve a large and uniform magnetic field, necessitating filters realized from small resonant cavities micromachined in thin films of Yttrium Iron Garnet. Filter insertion loss of 3.2 dB to 5.1 dB and out-of-band third order input intercept point greater than 41 dBm are achieved. The filter's broad frequency range, compact size, low insertion loss, high out-of-band linearity, and zero static power consumption are essential for protecting RF transceivers and antennas from interference, thus facilitating their use in mobile applications like IoT and 6G networks.

physics.app-ph

Inverse-designed low-index-contrast structures on silicon photonics platform for vector-matrix multiplication

Inverse-designed Silicon photonic metastructures offer an efficient platform to perform analog computations with electromagnetic waves. However, due to computational difficulties, scaling up these metastructures to handle a large number of data channels is not trivial. Furthermore, a typical inverse-design procedure utilizes a small computational domain and therefore tends to employ resonant features to achieve its objectives. This results in structures that are narrow-bandwidth and highly sensitive to fabrication errors. Here, we employ a 2D inverse-design method based on the effective index approximation with a low-index contrast constraint. This results in compact amorphous lens systems which are generally feed-forward and low-resonance. We designed and experimentally demonstrated a vector-matrix product for a 2 x 2 and a 3 x 3 matrix. We also designed a 10 x 10 matrix using the proposed 2D computational method. These examples demonstrate that these techniques have the potential to enable larger-scale wave-based analog computing platforms.

physics.optics

Inverse-designed multi-dimensional silicon photonic transmitters

Modern microelectronic processors have migrated towards parallel computing architectures with many-core processors. However, such expansion comes with diminishing returns exacted by the high cost of data movement between individual processors. The use of optical interconnects has burgeoned as a promising technology that can address the limits of this data transfer. While recent pushes to enhance optical communication have focused on developing wavelength-division multiplexing technology, this approach will eventually saturate the usable bandwidth, and new dimensions of data transfer will be paramount to fulfill the ever-growing need for speed. Here we demonstrate an integrated intra- and inter-chip multi-dimensional communication scheme enabled by photonic inverse design. Using inverse-designed mode-division multiplexers, we combine wavelength- and mode- multiplexing and send massively parallel data through nano-photonic waveguides and optical fibres. Crucially, as we take advantage of an orthogonal optical basis, our approach is inherently scalable to a multiplicative enhancement over the current state of the art.

physics.app-ph

Single-chip photonic deep neural network for instantaneous image classification

Deep neural networks with applications from computer vision and image processing to medical diagnosis are commonly implemented using clock-based processors, where computation speed is limited by the clock frequency and the memory access time. Advances in photonic integrated circuits have enabled research in photonic computation, where, despite excellent features such as fast linear computation, no integrated photonic deep network has been demonstrated to date due to the lack of scalable nonlinear functionality and the loss of photonic devices, making scalability to a large number of layers challenging. Here we report the first integrated end-to-end photonic deep neural network (PDNN) that performs instantaneous image classification through direct processing of optical waves. Images are formed on the input pixels and optical waves are coupled into nanophotonic waveguides and processed as the light propagates through layers of neurons on-chip. Each neuron generates an optical output from input optical signals, where linear computation is performed optically and the nonlinear activation function is realised opto-electronically. The output of a laser coupled into the chip is uniformly distributed among all neurons within the network providing the same per-neuron supply light. Thus, all neurons have the same optical output range enabling scalability to deep networks with large number of layers. The PDNN chip is used for 2- and 4-class classification of handwritten letters achieving accuracies of higher than 93.7% and 90.3%, respectively, with a computation time less than one clock cycle of state-of-the-art digital computation platforms. Direct clock-less processing of optical data eliminates photo-detection, A/D conversion, and the requirement for a large memory module, enabling significantly faster and more energy-efficient neural networks for the next generations of deep learning systems.

cs.ET