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Floarea Dumitrache

Publications and source records attributed to Floarea Dumitrache.

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Influence of Radiation and AC Coupling on Time Performance of Analog Pixels Test Structures in 65 nm CMOS technology

Monolithic Active Pixel Sensors (MAPS) in advanced CMOS imaging technologies are key to next-generation tracking systems for high-energy physics, where radiation hardness and precise vertex reconstruction are essential. As part of the ALICE ITS3 R&D program in synergy with the CERN R&D, we evaluated the performance of the Analog Pixel Test Structures (APTS) fabricated in the TPSCo 65 nm CMOS imaging process. The prototypes employ 10 um pitch pixels with a fast operational amplifier-based buffering stage at the output, enabling direct characterization of intrinsic sensor response. Beam tests with minimum ionizing particles assessed the timing and charge collection of DC- and AC-coupled designs, including devices exposed to 10^14 NIEL and 10^15 NIEL non ioninsing energy loss. DC-coupled sensors demonstrated stable performance, maintaining time resolution lower than 70 ps and >99% detection efficiency up to 10^15 NIEL. AC-coupled sensors demonstrated a wide operational margin, with efficiencies above 99% for clusterization thresholds below 150 electrons. Even though the AC coupling allows higher reverse bias than DC-coupled sensors, the reduced signal amplitude lowers the signal-to-noise ratio, increasing the jitter contribution. At high reverse bias, the AC-coupled sensors achieve time resolutions comparable to the DC-coupled version, demonstrating the viability of both approaches. These results also suggest that combining the low capacitance of DC-coupled designs with the high-bias capability of AC coupling could further enhance time resolution. These results confirm the suitability of 65 nm MAPS for future collider detectors requiring high radiation tolerance, efficiency, and timing precision.

physics.ins-det

Characterisation of the first wafer-scale prototype for the ALICE ITS3 upgrade: the monolithic stitched sensor (MOSS)

This paper presents the characterisation and testing of the first wafer-scale monolithic stitched sensor (MOSS) prototype developed for the ALICE ITS3 upgrade that is to be installed during the LHC Long Shutdown 3 (2026-2030). The MOSS chip design is driven by the truly cylindrical detector geometry that imposes that each layer is built out of two wafer-sized, bent silicon chips. The stitching technique is employed to fabricate sensors with dimensions of 1.4 $\times$ 25.9 cm, thinned to 50 $\mu$m. The chip architecture, in-pixel front-end, laboratory and in-beam characterisation, susceptibility to single-event effects, and series testing are discussed. The testing campaign validates the design of a wafer-scale stitched sensor and the performance of the pixel matrix to be within the ITS3 requirements. The MOSS chip demonstrates the feasibility of the ITS3 detector concept and provides insights for further optimisation and development.

physics.ins-det