arXiv subjects

François Lefloch

Publications and source records attributed to François Lefloch.

10 recordsLinked to original sources

arXiv2026

Origins of microwave losses in superconducting circuits made with silicon-on-insulator substrates

Silicon-on-insulator technology is widely used to fabricate silicon based devices, from advanced transistors to photonic circuits or nanomechanical systems. Integrating low loss superconducting quantum circuits with silicon-on-insulator substrates enables to couple the advantages offered by the mature silicon technology to the exquisite sensitivity of superconducting circuits. The natural approach, inherited from research in superconducting microwave devices, is to use a substrate made with highly resistive silicon, known for its low level of microwave losses. In this work, using superconducting microwave resonators, we show that counterintuitively, standard resistivity silicon-on-insulator substrates perform better than high resistivity silicon-on-insulator substrates at cryogenic temperatures. In the latter case, the presence of a parasitic sheet conduction at the interface between bulk silicon and silicon oxide acts as the dominant loss mechanism. This parasitic sheet can be suppressed using substrates with intentionally induced traps. In such substrates, losses are ultimately limited by the dielectric losses of the silicon oxide layer. These substrates offer interesting perspectives for the development of superconducting nanoelectromechanical systems. First, the release, i.e. the removal of the silicon oxide, could be limited to the moving parts, thereby maintaining the mechanical integrity of the rest of the device. Additionally, such structure would enhance heat evacuation into the bulk of the substrate which is an issue in current devices such as microwave-to-optics converters.

cond-mat.mes-hall↗

arXiv2023

From nonreciprocal to charge-4e supercurrents in Ge-based Josephson devices with tunable harmonic content

Hybrid superconductor(S)-semiconductor(Sm) devices bring a range of new functionalities into superconducting circuits. In particular, hybrid parity-protected qubits and Josephson diodes were recently proposed and experimentally demonstrated. Such devices leverage the non-sinusoidal character of the Josephson current-phase relation (CPR) in highly transparent S-Sm-S junctions. Here we report an experimental study of superconducting quantum-interference devices (SQUIDs) embedding Josephson field-effect transistors fabricated from a SiGe/Ge/SiGe heterostructure grown on a 200-mm silicon wafer. The single-junction CPR shows up to three harmonics with gate tunable amplitude. In the presence of microwave irradiation, the ratio of the first two dominant harmonics, corresponding to single and double Cooper-pair transport processes, is consistently reflected in relative weight of integer and half-integer Shapiro steps. A combination of magnetic-flux and gate-voltage control enables tuning the SQUID functionality from a nonreciprocal Josephson-diode regime with 27% asymmetry to a $π$-periodic Josephson regime suitable for the implementation of parity-protected superconducting qubits. These results illustrate the potential of Ge-based hybrid devices as versatile and scalable building blocks of novel superconducting quantum circuits.

cond-mat.mes-hall↗

arXiv2022

A gate-tunable graphene Josephson parametric amplifier

With a large portfolio of elemental quantum components, superconducting quantum circuits have contributed to dramatic advances in microwave quantum optics. Of these elements, quantum-limited parametric amplifiers have proven to be essential for low noise readout of quantum systems whose energy range is intrinsically low (tens of $μ$eV ). They are also used to generate non classical states of light that can be a resource for quantum enhanced detection. Superconducting parametric amplifiers, like quantum bits, typically utilize a Josephson junction as a source of magnetically tunable and dissipation-free nonlinearity. In recent years, efforts have been made to introduce semiconductor weak links as electrically tunable nonlinear elements, with demonstrations of microwave resonators and quantum bits using semiconductor nanowires, a two dimensional electron gas, carbon nanotubes and graphene. However, given the challenge of balancing nonlinearity, dissipation, participation, and energy scale, parametric amplifiers have not yet been implemented with a semiconductor weak link. Here we demonstrate a parametric amplifier leveraging a graphene Josephson junction and show that its working frequency is widely tunable with a gate voltage. We report gain exceeding 20 dB and noise performance close to the standard quantum limit. Our results complete the toolset for electrically tunable superconducting quantum circuits and offer new opportunities for the development of quantum technologies such as quantum computing, quantum sensing and fundamental science.

quant-ph↗

arXiv2021

Superconducting V$_3$Si for quantum circuit applications

V$_3$Si thin films are known to be superconducting with transition temperatures up to 15 K, depending on the annealing temperature and the properties of the substrate underneath. Here we investigate the film structural properties with the prospect of further integration in silicon technology for quantum circuits. Two challenges have been identified: (i) the large difference in thermal expansion rate between V$_3$Si and the Si substrate leads to large thermal strains after thermal processing, and (ii) the undesired silicide phase VSi$_2$ forms when V$_3$Si is deposited on silicon. The first of these is studied by depositing layers of 200 nm V$_3$Si on wafers of sapphire and oxidized silicon, neither of which react with the silicide. These samples are then heated and cooled between room temperature and 860°C, during which in-situ XRD measurements are performed. Analysis reveals a highly non-linear stress development during heating with contributions from crystallization and subsequent grain growth, as well as the thermal expansion mismatch between silicide and substrate, while the film behaves thermoelastically during cooling. The second challenge is explored by depositing films of 20, 50, 100 and 200 nm of V$_3$Si on bulk silicon. For each thickness, six samples are prepared, which are then annealed at temperatures between 500 and 750°C, followed by measurements of their resistivity, residual resistance ratio and superconducting critical temperature. A process window is identified for silicide thicknesses of at least 100 nm, within which a trade-off needs to be made between the quality of the V$_3$Si film and its consumption by the formation of VSi$_2$.

cond-mat.supr-con↗

arXiv2020

Influence of substrate-induced thermal stress on the superconducting properties of V3Si thin films

Thin films of superconducting V$_3$Si were prepared by means of RF sputtering from a compound V$_3$Si target at room temperature onto sapphire and oxide-coated silicon wafers, followed by rapid thermal processing under secondary vacuum. The superconducting properties of the films thus produced are found to improve with annealing temperature, which is ascribed to a reduction of defects in the polycrystalline layer. Critical temperatures ($T_\text{c}$) up to $15.3\,$K were demonstrated after thermal processing, compared to less than $1\,$K after deposition. The $T_\text{c}$ was found to always be lower on the silicon wafers, by on average $1.9(3)\,$K for the annealed samples. This difference, as well as a broadening of the superconducting transitions, is nearly independent of the annealing conditions. In-situ XRD measurements reveal that the silicide layer becomes strained upon heating due to a mismatch between the thermal expansion of the substrate and that of V$_3$Si. Taking into account the volume reduction due to crystallization, this mismatch is initially larger on sapphire, though stress relaxation allows the silicide layer to be in a relatively unstrained state after cooling. On oxidized silicon however, no clear evidence of relaxation upon cooling is observed, and the V$_3$Si ends up with an out-of-plane strain of 0.3\% at room temperature. This strain increases as the sample is cooled down to cryogenic temperatures, though the deformation of the polycrystalline layer is expected to be highly inhomogeneous. Taking into account also the reported occurrence of a Martensitic transition just above the critical temperature, this extrapolated strain distribution is found to closely match an existing model of the strain dependence of A-15 superconducting compounds.

cond-mat.supr-con↗

arXiv2018

Germanium quantum well Josephson field effect transistors and interferometers

Hybrid superconductor-semiconductor structures attract increasing attention owing to a variety of potential applications in quantum computing devices. They can serve to the realization of topological superconducting systems, as well as gate-tunable superconducting quantum bits. Here we combine a SiGe/Ge/SiGe quantum-well heterostructure hosting high-mobility two-dimensional holes and aluminum superconducting leads to realize prototypical hybrid devices, such as Josephson field-effect transistors (JoFETs) and superconducting quantum interference devices (SQUIDs). We observe gate-controlled supercurrent transport with Ge channels as long as one micrometer and estimate the induced superconducting gap from tunnel spectroscopy measurements in superconducting point-contact devices. Transmission electron microscopy reveals the diffusion of Ge into the aluminum contacts, whereas no aluminum is detected in the Ge channel.

cond-mat.mes-hall↗

arXiv2015

Silicon Superconducting Quantum Interference Device

We have studied a Superconducting Quantum Interference SQUID device made from a single layer thin film of superconducting silicon. The superconducting layer is obtained by heavily doping a silicon wafer with boron atoms using the Gas Immersion Laser Doping (GILD) technique. The SQUID device is composed of two nano-bridges (Dayem bridges) in a loop and shows magnetic flux modulation at low temperature and low magnetic field. The overall behavior shows very good agreement with numerical simulations based on the Ginzburg-Landau equations.

cond-mat.mes-hall↗

arXiv2014

Sub-Gap Structure in the Conductance of a Three-Terminal Josephson Junction

Three-terminal superconductor (S) - normal metal (N) - superconductor (S) Josephson junctions are investigated. In a geometry where a T-shape normal metal is connected to three superconducting reservoirs, new sub-gap structures appear in the differential resistance for specific combinations of the superconductor chemical potentials. Those correspond to a correlated motion of Cooper pairs within the device that persist well above the Thouless energy and is consistent with the prediction of quartets formed by two entangled Cooper pairs. A simplified nonequilibrium Keldysh Green's function calculation is presented that supports this interpretation.

cond-mat.mes-hall↗

arXiv2014

Electric field-controlled rippling of graphene

Metal/graphene interfaces generated by electrode deposition induce barriers or potential modulations influencing the electronic transport properties of graphene based devices. However, their impact on the local mechanical properties of graphene is much less studied. Here we show that graphene near a metallic interface can exhibit a set of ripples self-organized in domains whose topographic roughness is controlled by the tip bias of a scanning tunneling microscope. The reconstruction from topographic images of graphene bending energy maps sheds light on the local electro-mechanical response of graphene under STM imaging and unveils the role of the stress induced by the vicinity of graphene/metal interface in the formation and the manipulation of these ripples. Since microscopic rippling is one of the important factors that limit charge carrier mobility in graphene, the control of rippling with a gate voltage may have important consequences in the conductance of graphene devices where transverse electric fields are created by contactless suspended gate electrodes. This opens also the possibility to dynamically control the local morphology of graphene nanomembranes.

cond-mat.mes-hall↗

arXiv2007

Divergence at low bias and down-mixing of the current noise in a diffusive superconductor-normal metal-superconductor junction

We present current noise measurements in a long diffusive superconductor-normal-metal-superconductor junction in the low voltage regime, in which transport can be partially described in terms of coherent multiple Andreev reflections. We show that, when decreasing voltage, the current noise exhibits a strong divergence together with a broad peak. We ascribe this peak to the mixing between the ac- Josephson current and the noise of the junction itself. We show that the junction noise corresponds to the thermal noise of a nonlinear resistor 4kBT=R with R V = I V and no adjustable parameters.

cond-mat.mes-hall↗