arXiv subjects

Grayson M. Noah

Publications and source records attributed to Grayson M. Noah.

10 recordsLinked to original sources

arXiv2026

A Superconducting Phase Transition Single-Electron Transistor

Quantum computers require fast and accurate methods for qubit state detection. Phase-transition sensors exploit the abrupt change between two physical states of a material to achieve enhanced sensitivity and have enabled advanced detectors for quantum technologies, such as superconducting nanowire single-photon detectors. However, this sensing principle has not yet been applied to semiconductor spin qubits. Here, we demonstrate a superconducting phase-transition radio-frequency single-electron transistor (PTSET), a charge sensor for semiconductor spin qubits whose response is enhanced by a superconducting-to-normal phase transition. The transition is engineered by linking the sensor current to a low-critical-current, high-kinetic-inductance inductor integrated into the radio-frequency matching network. We demonstrate improvements in sensitivity of one and two orders of magnitude over conventional rfSETs in the large- and small-signal regimes, respectively. Our results establish phase-transition sensing as a route towards ultrasensitive, integrated charge sensors for semiconductor quantum computing and point to broader applications, including cryogenic photon detection for radio astronomy.

quant-ph↗

arXiv2025

Deep-Cryogenic Modeling of 22-nm FDSOI MOSFETs based on BSIM-IMG

We present a modeling approach based on the BSIM-IMG compact model to capture the deep-cryogenic behavior of MOSFET devices in a 22-nm FDSOI technology. The modeling flow is based on DC measurements to extract static parameters including variability and RF measurements to extract dynamic parameters. Modifications to the mobility equations are introduced to enable the modeling of intersubband scattering effect. The extracted models are used to enable deep-cryogenic simulations of a digital-to-analog converter (DAC), showing close agreement with measurement results.

cond-mat.mes-hall↗

arXiv2025

Characterization of heat transfer in 3D CMOS structures using Sideband Scanning Thermal Wave Microscopy

Efficient thermal management is critical for cryogenic CMOS circuits, where local heating can compromise device performance and qubit coherence. Understanding heat flow at the nanoscale in these multilayer architectures requires localized, high-resolution thermal probing techniques capable of accessing buried structures. Here, we introduce a sideband thermal wave detection scheme for Scanning Thermal Microscopy, S-STWM, to probe deeply buried heater structures within CMOS dies. By extracting the phase of propagating thermal waves, this method provides spatially resolved insight into heat dissipation pathways through complex multilayer structures. Our approach enables quantitative evaluation of thermal management strategies, informs the design of cryo-CMOS circuits, and establishes a foundation for in situ thermal characterization under cryogenic operating conditions.

cond-mat.other↗

arXiv2025

Spin Readout in a 22 nm Node Integrated Circuit

Constructing a quantum computer capable of broad and important applications is likely to require millions of addressable physical qubits, posing the challenge of large-scale integration of quantum systems with classical electronics. Fully depleted silicon-on-insulator CMOS technology has been used to develop a range of cryogenic electronic components for the control and readout of different qubit modalities interfaced on separate chips. However, recent measurements of quantum dots on this technology raise the tantalising prospect of realising control electronics and spin qubits on the same manufacturing platform, within a single integrated circuit (IC). Here, we demonstrate single-shot spin readout in addressable quantum dot devices within an IC fabricated using industry-standard 22 nm fully depleted silicon-on-insulator technology. We achieve spin-to-charge conversion via a ramped energy-selective measurement, detected using a radio-frequency single-electron transistor and addressed by on-chip cryogenic electronics. The observation of consistent readout visibilities exceeding 90% and millisecond spin relaxation times in two nominally identical devices within the addressable array supports the reproducibility of the unit cell. The successful observation of spin readout using this CMOS process marks a key step towards realising highly scalable and integrated spin qubits.

quant-ph↗

arXiv2025

Large-scale characterization of Single-Hole Transistors in 22-nm FDSOI CMOS Technology

State-of-the-art quantum processors have recently grown to reach 100s of physical qubits. As the number of qubits continues to grow, new challenges associated with scaling arise, such as device variability reduction and integration with cryogenic electronics for I/O management. Spin qubits in silicon quantum dots provide a platform where these problems may be mitigated, having demonstrated high control and readout fidelities and compatibility with large-scale manufacturing techniques of the semiconductor industry. Here, we demonstrate the monolithic integration of 384 p-type quantum dots, each embedded in a silicon transistor, with on-chip digital and analog electronics, all operating at deep cryogenic temperatures. The chip is fabricated using 22-nm fully-depleted silicon-on-insulator (FDSOI) CMOS technology. We extract key quantum dot parameters by fast readout and automated machine learning routines to determine the link between device dimensions and quantum dot yield, variability, and charge noise figures. Overall, our results demonstrate a path to monolithic integration of quantum and classical electronics at scale.

cond-mat.mes-hall↗

arXiv2025

An Integrated Deep-Cryogenic Temperature Sensor in CMOS Technology for Quantum Computing Applications

On-chip thermometry at deep-cryogenic temperatures is vital in quantum computing applications to accurately quantify the effect of increased temperature on qubit performance. In this work, we present a sub-1 K temperature sensor in CMOS technology based on the temperature dependence of the critical current of a superconducting (SC) thin-film. The sensor is implemented in 22-nm fully depleted silicon on insulator (FDSOI) technology and comprises a 6 nA resolution current-output digital-to-analog converter (DAC), a transimpedance amplifier (TIA) with a SC thin-film as a gain element, and a voltage comparator. The circuit dissipates 1.5 uW and is demonstrated operating at ambient temperatures as low as 15 mK, providing a variable temperature resolution reaching sub-10 mK.

quant-ph↗

arXiv2024

Method for efficient large-scale cryogenic characterization of CMOS technologies

Semiconductor integrated circuits operated at cryogenic temperature will play an essential role in quantum computing architectures. These can offer equivalent or superior performance to their room-temperature counterparts while enabling a scaling up of the total number of qubits under control. Silicon integrated circuits can be operated at a temperature stage of a cryogenic system where cooling power is sufficient ($\sim$3.5+ K) to allow for analog signal chain components (e.g. amplifiers and mixers), local signal synthesis, signal digitization, and control logic. A critical stage in cryo-electronics development is the characterization of individual transistor devices in a particular technology node at cryogenic temperatures. This data enables the creation of a process design kit (PDK) to model devices and simulate integrated circuits operating well below the minimum standard temperature ranges covered by foundry-released models (e.g. -55 °C). Here, an efficient approach to the characterization of large numbers of components at cryogenic temperature is reported. We developed a system to perform DC measurements with Kelvin sense of individual transistors at 4.2 K using integrated on-die multiplexers, enabling bulk characterization of thousands of devices with no physical change to the measurement setup.

cond-mat.mes-hall↗

arXiv2023

Rapid cryogenic characterisation of 1024 integrated silicon quantum dots

Quantum computers are nearing the thousand qubit mark, with the current focus on scaling to improve computational performance. As quantum processors grow in complexity, new challenges arise such as the management of device variability and the interface with supporting electronics. Spin qubits in silicon quantum dots are poised to address these challenges with their proven control fidelities and potential for compatibility with large-scale integration. Here, we demonstrate the integration of 1024 silicon quantum dots with on-chip digital and analogue electronics, all operating below 1 K. A high-frequency analogue multiplexer provides fast access to all devices with minimal electrical connections, enabling characteristic data across the quantum dot array to be acquired in just 5 minutes. We achieve this by leveraging radio-frequency reflectometry with state-of-the-art signal integrity, reaching a minimum integration time of 160 ps. Key quantum dot parameters are extracted by fast automated machine learning routines to assess quantum dot yield and understand the impact of device design. We find correlations between quantum dot parameters and room temperature transistor behaviour that may be used as a proxy for in-line process monitoring. Our results show how rapid large-scale studies of silicon quantum devices can be performed at lower temperatures and measurement rates orders of magnitude faster than current probing techniques, and form a platform for the future on-chip addressing of large scale qubit arrays.

quant-ph↗

arXiv2023

Measurement of cryoelectronics heating using a local quantum dot thermometer in silicon

Silicon technology offers the enticing opportunity for monolithic integration of quantum and classical electronic circuits. However, the power consumption levels of classical electronics may compromise the local chip temperature and hence the fidelity of qubit operations. Here, we utilize a quantum-dot-based thermometer embedded in an industry-standard silicon field-effect transistor (FET), to assess the local temperature increase produced by an active FET placed in close proximity. We study the impact of both static and dynamic operation regimes. When the FET is operated statically, we find a power budget of 45 nW at 100 nm separation whereas at 216 $μ$m the power budget raises to 150 $μ$W. When operated dynamically, we observe negligible temperature increase for the switch frequencies tested up to 10 MHz. Our work describes a method to accurately map out the available power budget at a distance from a solid-state quantum processor and indicate under which conditions cryoelectronics circuits may allow the operation of hybrid quantum-classical systems.

cond-mat.mes-hall↗

arXiv2023

CMOS on-chip thermometry at deep cryogenic temperatures

Accurate on-chip temperature sensing is critical for the optimal performance of modern CMOS integrated circuits (ICs), to understand and monitor localized heating around the chip during operation. The development of quantum computers has stimulated much interest in ICs operating a deep cryogenic temperatures (typically 0.01 - 4 K), in which the reduced thermal conductivity of silicon and silicon oxide, and the limited cooling power budgets make local on-chip temperature sensing even more important. Here, we report four different methods for on-chip temperature measurements native to complementary metal-oxide-semiconductor (CMOS) industrial fabrication processes. These include secondary and primary thermometry methods and cover conventional thermometry structures used at room temperature as well as methods exploiting phenomena which emerge at cryogenic temperatures, such as superconductivity and Coulomb blockade. We benchmark the sensitivity of the methods as a function of temperature and use them to measure local excess temperature produced by on-chip heating elements. Our results demonstrate thermometry methods that may be readily integrated in CMOS chips with operation from the milliKelivin range to room temperature.

physics.app-ph↗