arXiv subjects

Hagyoul Bae

Publications and source records attributed to Hagyoul Bae.

4 recordsLinked to original sources

arXiv2026

Demonstration of High-Performance Ultra-Wide Bandgap SrSnO$_3$ Top-Gated MOSFETs

We report the demonstration of high-performance top-gated metal-oxide-semiconductor field-effect transistors (MOSFETs) based on the ultra-wide bandgap perovskite oxide SrSnO$_3$ (SSO). Using hybrid molecular beam epitaxy-grown SSO channels and ALD-deposited HfO$_2$ gate dielectrics, the devices exhibit field-effect mobility exceeding 65 cm$^2$/V$\cdot$s, an on-state current up to 194 mA/mm, an on/off current ratio above $10^8$, and a contact resistance of 0.66 $\Omega\cdot$mm. The devices also show a near-ideal subthreshold slope of 68 mV/dec and negligible hysteresis, indicating a high-quality dielectric/semiconductor interface. These results establish SrSnO$_3$ as a promising ultra-wide bandgap oxide semiconductor platform for high-performance power electronic applications.

cond-mat.mtrl-sci↗

arXiv2025

High-Performance Ultra-Wide-Bandgap CaSnO3 Metal-Oxide-Semiconductor Field-Effect Transistors

The increasing demand for high-voltage and high-power electronic applications has intensified the search for novel ultrawide bandgap (UWB) semiconductors. Alkaline earth stannates possess wide band gaps and exhibit the highest room-temperature electron mobilities among all perovskite oxides. Among this family, Calcium stannate (CaSnO3) has the largest band gap of ~4.7 eV, holding great promise for high-power applications. However, the demonstration of CaSnO3 power electronic devices is so far limited. In this work, high-performance metal-oxide-semiconductor field-effect transistor (MOSFET) devices based on La-doped CaSnO3 are demonstrated for the first time. The MOSFETs exhibit an on/off ratio exceeding 10^8, along with field-effect mobility of 8.4 cm2 V-1 s-1 and on-state current of 30 mA mm-1. The high performance of the CaSnO3 MOSFET devices can be ascribed to the excellent metal-to-semiconductor contact resistance of 0.73 k{\Omega}{\mu}m. The devices also show great potential for harsh environment operations, as high-temperature operations up to 400 K have been demonstrated. An off-state breakdown voltage of 1660 V is achieved, with a breakdown field of ~8.3 MV cm-1 among the highest reported for all UWB semiconductors. This work represents significant progress toward realizing the practical application of CaSnO3 in future high-voltage power electronic technologies.

cond-mat.mtrl-sci↗

arXiv2024

First Demonstration of HZO/beta-Ga2O3 Ferroelectric FinFET with Improved Memory Window

We have experimentally demonstrated the effectiveness of beta-gallium oxide (beta-Ga2O3) ferroelectric fin field-effect transistors (Fe-FinFETs) for the first time. Atomic layer deposited (ALD) hafnium zirconium oxide (HZO) is used as the ferroelectric layer. The HZO/beta-Ga2O3 Fe-FinFETs have wider counterclockwise hysteresis loops in the transfer characteristics than that of conventional planar FET, achieving record-high memory window (MW) of 13.9 V in a single HZO layer. When normalized to the actual channel width, FinFETs show an improved ION/IOFF ratio of 2.3x10^7 and a subthreshold swing value of 110 mV/dec. The enhanced characteristics are attributed to the low-interface state density (Dit), showing good interface properties between the beta-Ga2O3 and HZO layer. The enhanced polarization due to larger electric fields across the entire ferroelectric layer in FinFETs is validated using Sentaurus TCAD. After 5x10^6 program/erase (PGM/ERS) cycles, the MW was maintained at 9.2 V, and the retention time was measured up to 3x10^4 s with low degradation. Therefore, the ultrawide bandgap (UWBG) Fe-FinFET was shown to be one of the promising candidates for high-density non-volatile memory devices.

physics.app-ph↗

arXiv2021

First Demonstration of Robust Tri-Gate \b{eta}-Ga2O3 Nano-membrane Field-Effect Transistors Operated Up to 400 °C

Nano-membrane tri-gate beta-gallium oxide (\b{eta}-Ga2O3) field-effect transistors (FETs) on SiO2/Si substrate fabricated via exfoliation have been demonstrated for the first time. By employing electron beam lithography, the minimum-sized features can be defined with a 50 nm fin structure. For high-quality interface between \b{eta}-Ga2O3 and gate dielectric, atomic layer-deposited 15-nm-thick aluminum oxide (Al2O3) was utilized with Tri-methyl-aluminum (TMA) self-cleaning surface treatment. The fabricated devices demonstrate extremely low subthreshold slope (SS) of 61 mV/dec, high drain current (IDS) ON/OFF ratio of 1.5 X 109, and negligible transfer characteristic hysteresis. We also experimentally demonstrated robustness of these devices with current-voltage (I-V) characteristics measured at temperatures up to 400 °C.

physics.app-ph↗