arXiv subjects

Hendrik Bluhm

Publications and source records attributed to Hendrik Bluhm.

At least 19 recordsLinked to original sources

arXiv2026

Enhanced intrinsic spin-orbit driving of a Loss-DiVincenzo qubit near the spin-valley hotspot in Si/SiGe

In most Si/SiGe-based spin qubit implementations, high-fidelity single-qubit gates are achieved using micromagnets, which enable the use of electric spin dipole resonance via synthetic spin-orbit coupling (s-SOC). In contrast, intrinsic spin-orbit coupling (i-SOC) in silicon is generally considered to be weak. However, in Si/SiGe heterostructures, theory predicts a substantial enhancement when the Zeeman splitting approaches the valley splitting if symmetry is reduced by an imperfect interface. Here, we demonstrate a Si/SiGe Loss-DiVincenzo qubit driven by i-SOC close to this so-called spin-valley hotspot. In particular, we characterize the Rabi frequency as a function of the energy detuning from the hotspot by sweeping both the magnetic field and quantum dot position. We observe the predicted enhancement of the Rabi frequency near the hotspot, but also find an asymmetry that deviates from existing theoretical models as well as distortions of the Chevron patterns near the hotspot. While we achieve an average single-qubit Clifford fidelity of 98.6 %, the strong variability of the valley splitting may impede the use of i-SOC-based control as a scalable operational strategy; understanding its effect is nevertheless important for reproducible high-fidelity control. Our results provide an empirical basis for refining current theoretical models of spin-valley physics in Si/SiGe heterostructures.

cond-mat.mes-hall↗

arXiv2026

Phononic Bragg Reflectors for Thermal Insulation of Scalable Cryogenic Control Electronics from Qubits

Scaling solid-state architectures to the millions of qubits required for utility-scale quantum computing could benefit from the integration of control electronics in the immediate vicinity of the quantum layer. However, lithographically fabricated solid-state qubits perform best at temperatures well below 1 K, where available cooling power is limited, whereas the control electronics dissipate substantial power and therefore require the higher cooling power available at elevated temperatures. To address this challenge, we propose a cryopackaging concept that uses broadband phononic Distributed Bragg Reflectors (DBRs) as a thermal barrier between cryoelectronics and the qubit chip. As an experimental realization of this concept, we fabricate and characterize Ta/SiO$_2$ DBR structures. In this architecture, the DBR is intended to provide mechanical support for superconducting vias while offering substantially better thermal insulation than typical bulk materials. For a 600-nm-thick DBR consisting of 10 Ta/SiO$_2$ bilayers, we obtain a thermal conduction below 1 mW/cm$^2$ from 1.5 K to 100 mK. In a centimeter-scale architecture, this level of isolation is compatible with Watt-level cooling power for nearby electronics while maintaining a qubit temperature around 100 mK in commercially available dilution refrigerators.

quant-ph↗

arXiv2026

Mapping g-factors and complex intervalley coupling in Si/SiGe by conveyor-mode shuttling

As silicon spin qubit chips are increasing in qubit number and area, methods for the screening of qubit related material parameters become vital. Here we demonstrate the two-dimensional mapping of small variations of the electron g-factor of quantum dots formed in planar Si/SiGe quantum wells with precision better than $10^{-3}$ and with nanometer lateral resolution. We scan the electron g-factor across a 40 nm $\times$ 400 nm area and observe two g-factors per QD site which obey a striking symmetry and bimodal distribution across the area. These two g-factors relate to valley states of the electron in the quantum dot in agreement with a recent theoretical model. Using conveyor-belt shuttling of entangled electron spin pairs, complementary to the mapping of the local valley-splitting, we map the g-factor. We compare g-factor and valley splitting maps measured on the same device, and extract the complex intervalley coupling parameter along the shuttle trajectories applying a theoretical model of g-factor dependence on intervalley coupling. These maps will allow unprecedented insights into the spin-valley dynamics during qubit manipulation, readout and shuttling and serve as a benchmark for the engineering of Si/SiGe heterostructures for large-scale quantum chips.

quant-ph↗

arXiv2026

Data-Driven Qubit Characterization and Optimal Control using Deep Learning

Quantum computing requires the optimization of control pulses to achieve high-fidelity quantum gates. We propose a machine learning-based protocol to address the challenges of evaluating gradients and modeling complex system dynamics. By training a recurrent neural network (RNN) to predict qubit behavior, our approach enables efficient gradient-based pulse optimization without the need for a detailed system model. First, we sample qubit dynamics using random control pulses with weak prior assumptions. We then train the RNN on the system's observed responses, and use the trained model to optimize high-fidelity control pulses. We demonstrate the effectiveness of this approach through simulations on a single $ST_0$ qubit.

quant-ph↗

arXiv2026

Conveyor-mode electron shuttling through a T-junction in Si/SiGe

Conveyor-mode shuttling in gated Si/SiGe devices enables adiabatic transfer of single electrons, electron patterns and spin qubits confined in quantum dots across several microns with a scalable number of signal lines. To realize their full potential, linear shuttle lanes must connect into a two-dimensional grid with controllable routing. We introduce a T-junction device linking two independently driven shuttle lanes. Electron routing across the junction requires no extra control lines beyond the four channels per conveyor belt. We measure an inter-lane charge transfer fidelity of $F = 100.0000000^{+0}_{-9\times 10^{-7}}\,\%$ at an instantaneous electron velocity of $270\,\mathrm{mm}\,\mathrm{s}^{-1}$. The filling of 54 quantum dots is controlled by simple atomic pulses, allowing us to swap electron patterns, laying the groundwork for a native spin-qubit SWAP gate. This T-junction establishes a path towards scalable, two-dimensional quantum computing architectures with flexible spin qubit routing for quantum error correction.

cond-mat.mes-hall↗

arXiv2025

Exchange interaction in gate-defined quantum dots beyond the Hubbard model

A quantitative description of the exchange interaction in quantum dots is relevant for modeling gate operations of spin qubits. By measuring the amplitude and frequency of exchange-driven qubit state oscillations, we measure the detuning dependence of the exchange coupling in a GaAs double quantum dot over three orders of magnitude. Both 1D and 3D full configuration interaction simulations can replicate the observed behavior. Extending a Hubbard model by including excited states increases the range of detuning where it provides a good fit, thus elucidating the underlying physics.

cond-mat.mes-hall↗

arXiv2025

Impact of the local valley splitting on the coherence of conveyor-belt spin shuttling in $^{28}$Si/SiGe

Silicon quantum chips offer a promising path toward scalable, fault-tolerant quantum computing, with the potential to host millions of qubits. However, scaling up dense quantum-dot arrays and enabling qubit interconnections through shuttling are hindered by uncontrolled lateral variations of the valley splitting energy $E_{VS}$. We map $E_{VS}$ across a $40 \, $nm x $400 \, $nm region of a $^{28}$Si/Si$_{0.7}$Ge$_{0.3}$ shuttle device and analyze the spin coherence of a single electron spin transported by conveyor-belt shuttling. We observe that the $E_{VS}$ varies over a wide range from $1.5 \, \mu$eV to $200 \, \mu$eV and is dominated by SiGe alloy disorder. In regions of low $E_{VS}$ and at spin-valley resonances, spin coherence is reduced and its dependence on shuttle velocity matches predictions. Rapid and frequent traversal of low-$E_{VS}$ regions induces a regime of enhanced spin coherence explained by motional narrowing. By selecting shuttle trajectories that avoid problematic areas on the $E_{VS}$ map, we achieve transport over tens of microns with coherence limited only by the coupling to a static electron spin entangled with the mobile qubit. Our results provide experimental confirmation of the theory of spin-decoherence of mobile electron spin-qubits and present practical strategies to integrate conveyor-mode qubit shuttling into silicon quantum chips.

quant-ph↗

arXiv2025

Non-equilibrium state during proton-deuteron exchange at a liquid-liquid interface

Proton-deuteron exchange is a very fast process, even across macroscopic length scales. Here we directly and quantitatively measure the formation of HDO within the first 100 microseconds of the reaction at the liquid-liquid interface between D$_2$O and H$_2$O, using a fast-flowing liquid flat jet combined with infrared spectroscopic imaging. We demonstrate that, at early stages HDO formation is reaction-limited, set by the low concentration of the hydroxide and hydronium ions that mediate the exchange. As the ion concentration rises, the rate rapidly approaches the diffusion limit. The reaction rate constant we extract is consistent with the picosecond timescale of the elementary proton-deuteron exchange. Access to these microsecond kinetics reveals a non-equilibrium state in the early H$_2$O/D$_2$O interface: the two liquids are fully mixed by diffusion, yet the HDO concentration remains well below equilibrium. Quantitative imaging of reactant and product concentrations at well-defined liquid-liquid interfaces, as introduced here, will enable the study of fast kinetics across a wide range of chemical reactions.

physics.chem-ph↗

arXiv2025

High yield, low disorder Si/SiGe heterostructures for spin qubit devices manufactured in a BiCMOS pilot line

The prospect of achieving fault-tolerant quantum computing with semiconductor spin qubits in Si/SiGe heterostructures relies on the integration of a large number of identical devices, a feat achievable through a scalable (Bi)CMOS manufacturing approach. To this end, both the gate stack and the Si/SiGe heterostructure must be of high quality, exhibiting uniformity across the wafer and consistent performance across multiple fabrication runs. Here, we report a comprehensive investigation of Si/SiGe heterostructures and gate stacks, fabricated in an industry-standard 200 mm BiCMOS pilot line. We evaluate the homogeneity and reproducibility by probing the properties of the two-dimensional electron gas (2DEG) in the shallow silicon quantum well through magnetotransport characterization of Hall bar-shaped field-effect transistors at 1.5 K. Across all the probed wafers, we observe minimal variation of the 2DEG properties, with an average maximum mobility of $(4.25\pm0.17)\times 10^{5}$ cm$^{2}$/Vs and low percolation carrier density of $(5.9\pm0.18)\times 10^{10}$ cm$^{-2}$ evidencing low disorder potential in the quantum well. The observed narrow statistical distribution of the transport properties highlights the reproducibility and the stability of the fabrication process. Furthermore, wafer-scale characterization of a selected individual wafer evidenced the homogeneity of the device performances across the wafer area. Based on these findings, we conclude that our material and processes provide a suitable platform for the development of scalable, Si/SiGe-based quantum devices.

cond-mat.mes-hall↗

arXiv2025

Industrially fabricated single-electron quantum dots in Si/Si-Ge heterostructures

This paper reports the compatibility of heterostructure-based spin qubit devices with industrial CMOS technology. It features Si/Si-Ge quantum dot devices fabricated using Infineon's 200 mm production line within a restricted thermal budget. The devices exhibit state-of-the-art charge sensing, charge noise and valley splitting characteristics, showing that industrial fabrication is not harming the heterostructure quality. These measured parameters are all correlated to spin qubit coherence and qubit gate fidelity. We describe the single electron device layout, design and its fabrication process using electron beam lithography. The incorporated standard 90 nm back-end of line flow for gate-layer independent contacting and wiring can be scaled up to multiple wiring layers for scalable quantum computing architectures. In addition, we present millikelvin characterization results. Our work exemplifies the potential of industrial fabrication methods to harness the inherent CMOS-compatibility of the Si/Si-Ge material system, despite being restricted to a reduced thermal budget. It paves the way for advanced quantum processor architectures with high yield and device quality.

cond-mat.mes-hall↗

arXiv2025

Performance of the spin qubit shuttling architecture for a surface code implementation

Qubit shuttling promises to advance some quantum computing platforms to the qubit register sizes needed for effective quantum error correction (QEC), but also introduces additional errors whose impact must be evaluated. The established method to investigate the performance of QEC codes in a realistic scenario is to employ a standard noise model known as circuit-level noise, where all quantum operations are modeled as noisy. In the present work, we take this noise model and single out the effect of shuttling errors by introducing them as an additional so-called error location. This hardware abstraction is motivated by the SpinBus architecture and allows a systematic numerical investigation to map out the resulting two-dimensional parameter space. To this end, we take the Surface code and perform large scale simulations, most notably extracting the threshold across said two-dimensional parameter space. We study two scenarios for shuttling errors, depolarization on the one hand and dephasing on the other hand. For a purely dephasing shuttling error, we find a threshold of several percent, provided that all other operations have a high fidelity. The qubit overhead needed to reach a logical error rate of $10^{-12}$ (known as the "teraquop" regime~\cite{Gidney2021Jul}) increases only moderately for shuttling error rates up to about 1 \% per shuttling operation. The error rates at which practically useful, i.e. well below threshold error correction is predicted to be possible are comfortably higher than what is expected to be achievable for spin qubits. Our results thus show that it is reasonable to expect shuttling operations to fall below threshold already at surprisingly large error rates. With realistic efforts in the near term, this offers positive prospects for spin qubit based quantum processors as a viable avenue for scalable fault-tolerant error-corrected quantum computing.

quant-ph↗

arXiv2024

Strategies for enhancing spin-shuttling fidelities in Si/SiGe quantum wells with random-alloy disorder

Coherent coupling between distant qubits is needed for any scalable quantum computing scheme. In quantum dot systems, one proposal for long-distance coupling is to coherently transfer electron spins across a chip in a moving potential. Here, we use simulations to study challenges for spin shuttling in Si/SiGe heterostructures caused by the valley degree of freedom. We show that for devices with valley splitting dominated by alloy disorder, one can expect to encounter pockets of low valley splitting, given a long-enough shuttling path. At such locations, inter-valley tunneling leads to dephasing of the spin wavefunction, substantially reducing the shuttling fidelity. We show how to mitigate this problem by modifying the heterostructure composition, or by varying the vertical electric field, the shuttling velocity, the shape and size of the dot, or the shuttling path. We further show that combinations of these strategies can reduce the shuttling infidelity by several orders of magnitude, putting shuttling fidelities sufficient for error correction within reach.

cond-mat.mes-hall↗

arXiv2024

Long distance spin shuttling enabled by few-parameter velocity optimization

Spin qubit shuttling via moving conveyor-mode quantum dots in Si/SiGe offers a promising route to scalable miniaturized quantum computing. Recent modeling of dephasing via valley degrees of freedom and well disorder dictate a slow shutting speed which seems to limit errors to above correction thresholds if not mitigated. We increase the precision of this prediction, showing that typical errors for 10 $μ$m shuttling at constant speed results in O(1) error, using fast, automatically differentiable numerics and including improved disorder modeling and potential noise ranges. However, remarkably, we show that these errors can be brought to well below fault-tolerant thresholds using trajectory shaping with very simple parametrization with as few as 4 Fourier components, well within the means for experimental in-situ realization, and without the need for targeting or knowing the location of valley near degeneracies.

quant-ph↗

arXiv2024

Scalable Parity Architecture With a Shuttling-Based Spin Qubit Processor

Motivated by the prospect of a two-dimensional square-lattice geometry for semiconductor spin qubits, we explore the realization of the Parity Architecture with quantum dots (QDs). We present sequences of spin shuttling and quantum gates that implement the Parity Quantum Approximate Optimization Algorithm (QAOA) on a lattice constructed of identical unit cells, such that the circuit depth is always constant. We further develop a detailed error model for a hardware-specific analysis of the Parity Architecture and we estimate the errors during one round of Parity QAOA. The model includes a general description of the shuttling errors as a function of the probability distribution function of the valley splitting, which is the main limitation for the performance. We compare our approach to a superconducting transmon qubit chip and we find that with high-fidelity spin shuttling the performance of the spin qubits is competitive or even exceeds the results of the transmons. Finally, we discuss the possibility of decoding the logical quantum state and of quantum error mitigation. We find that already with near-term spin qubit devices a sufficiently low physical error probability can be expected to reliably perform Parity QAOA with a short depth in a regime where the success probability compares favorably to standard QAOA.

quant-ph↗

arXiv2024

Direct Observation of Morphological and Chemical Changes During the Oxidation of Model Inorganic Ligand-Capped Particles

Functionalization and volatilization are competing reactions during the oxidation of carbonaceous materials and are important processes in many different areas of science and technology. Here we present a combined ambient pressure X-ray photoelectron spectroscopy (APXPS) and grazing incidence X-ray scattering (GIXS) investigation of the oxidation of oleic acid ligands surrounding NaYF4 nanoparticles (NPs) deposited onto SiOx/Si substrates. While APXPS monitors the evolution of the oxidation products, GIXS provides insight into the morphology of the ligands and particles before and after the oxidation. Our investigation shows that the oxidation of the oleic acid ligands proceeds at O2 partial pressures of below 1 mbar in the presence of X-rays, with the oxidation eventually reaching a steady state in which mainly CHx and -COOH functional groups are observed. The scattering data reveal that the oxidation and volatilization reaction proceeds preferentially on the side of the particle facing the gas phase, leading to the formation of a chemically and morphologically asymmetric ligand layer. This comprehensive picture of the oxidation process could only be obtained by combining the X-ray scattering and APXPS data. The investigation presented here lays the foundation for further studies of the stability of NP layers in the presence of reactive trace gasses and ionizing radiation, and for other nanoscale systems where chemical and morphological changes happen simultaneously and cannot be understood in isolation.

physics.chem-ph↗

arXiv2024

An efficient singlet-triplet spin qubit to fiber interface assisted by a photonic crystal cavity

We introduce a novel optical interface between a singlet-triplet spin qubit and a photonic qubit which would offer new prospects for future quantum communication applications. The interface is based on a 220 nm thick GaAs/Al-GaAs heterostructure membrane and features a gate-defined singlet-triplet qubit, a gate-defined optically active quantum dot, a photonic crystal cavity and a bot-tom gold reflector. All essential components can be lithographically defined and deterministically fabricated, which greatly increases the scalability of on-chip in-tegration. According to our FDTD simulations, the interface provides an overall coupling efficiency of 28.7% into a free space Gaussian beam, assuming an SiO2 interlayer filling the space between the reflector and the membrane. The performance can be further increased to 48.5% by undercutting this SiO2 interlayer below the photonic crystal.

physics.optics↗

arXiv2024

Noise reduction by bias cooling in gated Si/SixGe1-x quantum dots

Silicon-Germanium heterostructures are a promising quantum circuit platform, but crucial aspects as the long-term charge dynamics and cooldown-to-cooldown variations are still widely unexplored quantitatively. In this letter we present the results of an extensive bias cooling study performed on gated silicon-germanium quantum dots with an Al2O3-dielectric. Over 80 cooldowns were performed in the course of our investigations. The performance of the devices is assessed by low-frequency charge noise measurements in the band of 200 micro Hertz to 10 milli Hertz. We measure the total noise power as a function of the applied voltage during cooldown in four different devices and find a minimum in noise at 0.7V bias cooling voltage for all observed samples. We manage to decrease the total noise power median by a factor of 6 and compute a reduced tunneling current density using Schrödinger-Poisson simulations. Furthermore, we show the variation in noise from the same device in the course of eleven different cooldowns performed under the nominally same conditions.

cond-mat.mes-hall↗

arXiv2024

Large spin shuttling oscillations enabling high-fidelity single qubit gates

Semiconductor quantum dots have shown impressive breakthroughs in the last years, with single and two qubit gate fidelities matching other leading platforms and scalability still remaining a relative strength. However, due to qubit wiring considerations, mobile electron architectures have been proposed to facilitate upward scaling. In this work, we examine and demonstrate the possibility of significantly outperforming static EDSR-type single-qubit pulsing by taking advantage of the larger spatial mobility to achieve larger Rabi frequencies and reduce the effect of charge noise. Our theoretical results indicate that fidelities are ultimately bottlenecked by spin-valley physics, which can be suppressed through the use of quantum optimal control, and we demonstrate that, across different potential regimes and competing physical models, shuttling based single-qubit gates retain significant advantage over existing alternatives.

quant-ph↗