arXiv subjects

Heorhii Bohuslavskyi

Publications and source records attributed to Heorhii Bohuslavskyi.

13 recordsLinked to original sources

arXiv2024

Scalable on-chip multiplexing of silicon single and double quantum dots

Owing to the maturity of complementary metal oxide semiconductor (CMOS) microelectronics, qubits realized with spins in silicon quantum dots (QDs) are considered among the most promising technologies for building scalable quantum computers. For this goal, ultra-low-power on-chip cryogenic CMOS (cryo-CMOS) electronics for control, read-out, and interfacing of the qubits is an important milestone. We report on-chip interfacing of tunable electron and hole QDs by a 64-channel cryo-CMOS multiplexer with less-than-detectable static power dissipation. We analyze charge noise and measure state-of-the-art addition energies and gate lever arm parameters in the QDs. We correlate low noise in QDs and sharp turn-on characteristics in cryogenic transistors, both fabricated with the same gate stack. Finally, we demonstrate that our hybrid quantum-CMOS technology provides a route to scalable interfacing of a large number of QD devices, enabling, for example, variability analysis and QD qubit geometry optimization, which are prerequisites for building large-scale silicon-based quantum computers.

cond-mat.mes-hall↗

arXiv2024

Wafer-scale CMOS-compatible graphene Josephson field-effect transistors

Electrostatically tunable Josephson field-effect transistors (JoFETs) are one of the most desired building blocks of quantum electronics. JoFET applications range from parametric amplifiers and superconducting qubits to a variety of integrated superconducting circuits. Here, we report on graphene JoFET devices fabricated with wafer-scale complementary metal-oxide-semiconductor (CMOS) compatible processing based on wet transfer of chemical vapour deposited graphene, atomic-layer-deposited Al$_{2}$O$_{3}$ gate oxide, and evaporated superconducting Ti/Al source, drain, and gate contacts. By optimizing the contact resistance down to $\sim$ 170 $Ωμm$, we observe proximity-induced superconductivity in the JoFET channels with different gate lengths of 150 - 350 nm. The Josephson junction devices show reproducible critical current $I_{\text{C}}$ tunablity with the local top gate. Our JoFETs are in short diffusive limit with the $I_{\text{C}}$ reaching up to $\sim\,$3 $μA$ for a 50 $μm$ channel width. Overall, our demonstration of CMOS-compatible 2D-material-based JoFET fabrication process is an important step toward graphene-based integrated quantum circuits.

physics.app-ph↗

arXiv2023

Gate reflectometry in dense quantum dot arrays

Silicon quantum devices are maturing from academic single- and two-qubit devices to industrially-fabricated dense quantum-dot (QD) arrays, increasing operational complexity and the need for better pulsed-gate and readout techniques. We perform gate-voltage pulsing and gate-based reflectometry measurements on a dense 2$\times$2 array of silicon quantum dots fabricated in a 300-mm-wafer foundry. Utilizing the strong capacitive couplings within the array, it is sufficient to monitor only one gate electrode via high-frequency reflectometry to establish single-electron occupation in each of the four dots and to detect single-electron movements with high bandwidth. A global top-gate electrode adjusts the overall tunneling times, while linear combinations of side-gate voltages yield detailed charge stability diagrams. To test for spin physics and Pauli spin blockade at finite magnetic fields, we implement symmetric gate-voltage pulses that directly reveal bidirectional interdot charge relaxation as a function of the detuning between two dots. Charge sensing within the array can be established without the involvement of adjacent electron reservoirs, important for scaling such split-gate devices towards longer 2$\times$N arrays. Our techniques may find use in the scaling of few-dot spin-qubit devices to large-scale quantum processors.

cond-mat.mes-hall↗

arXiv2022

Autonomous estimation of high-dimensional Coulomb diamonds from sparse measurements

Quantum dot arrays possess ground states governed by Coulomb energies, utilized prominently by singly occupied quantum dots, each implementing a spin qubit. For such quantum processors, the controlled transitions between ground states are of operational significance, as these allow the control of quantum information within the array such as qubit initialization and entangling gates. For few-dot arrays, ground states are traditionally mapped out by performing dense raster-scan measurements in control-voltage space. These become impractical for larger arrays due to the large number of measurements needed to sample the high-dimensional gate-voltage hypercube and the comparatively little information extracted. We develop a hardware-triggered detection method based on reflectometry, to acquire measurements directly corresponding to transitions between ground states. These measurements are distributed sparsely within the high-dimensional voltage space by executing line searches proposed by a learning algorithm. Our autonomous software-hardware algorithm accurately estimates the polytope of Coulomb blockade boundaries, experimentally demonstrated in a 2$\times$2 array of silicon quantum dots.

cond-mat.mes-hall↗

arXiv2022

Fast time-domain current measurement for quantum dot charge sensing using a homemade cryogenic transimpedance amplifier

We developed a high-speed and low-noise time-domain current measurement scheme using a homemade GaAs high-electron-mobility-transistor-based cryogenic transimpedance amplifier (TIA). The scheme is versatile for broad cryogenic current measurements, including semiconductor spin-qubit readout, owing to the TIA's having low input impedance comparable to that of commercial room-temperature TIAs. The TIA has a broad frequency bandwidth and a low noise floor, with a trade-off between them governed by the feedback resistance $R_{FB}$. A lower $R_{FB}$ of 50 k$Ω$ enables high-speed current measurement with a -3dB cutoff frequency $f_{-3dB}$ = 28 MHz and noise-floor $NF = 8.5 \times 10^{-27}$ A$^{2}$/Hz, while a larger $R_{FB}$ of 400 k$Ω$ provides low-noise measurement with $NF = 1.0 \times 10^{-27}$ A$^{2}$/Hz and $f_{-3dB}$ = 4.5 MHz. Time-domain measurement of a 2-nA peak-to-peak square wave, which mimics the output of the standard spin-qubit readout technique via charge sensing, demonstrates a signal-to-noise ratio (SNR) of 12.7, with the time resolution of 48 ns, for $R_{FB}$ = 200 k$Ω$, which compares favorably with the best-reported values for the radio-frequency (RF) reflectometry technique. The time resolution can be further improved at the cost of the SNR (or vice versa) by using an even smaller (larger) $R_{FB}$, with a further reduction in the noise figure possible by limiting the frequency band with a low-pass filter. Our scheme is best suited for readout electronics for cryogenic sensors that require a high time resolution and current sensitivity and thus provides a solution for various fundamental research and industrial applications.

cond-mat.mes-hall↗

arXiv2020

Single-electron control in a foundry-fabricated two-dimensional qubit array

Silicon spin qubits have achieved high-fidelity one- and two-qubit gates, above error correction thresholds, promising an industrial route to fault-tolerant quantum computation. A significant next step for the development of scalable multi-qubit processors is the operation of foundry-fabricated, extendable two-dimensional (2D) arrays. In gallium arsenide, 2D quantum-dot arrays recently allowed coherent spin operations and quantum simulations. In silicon, 2D arrays have been limited to transport measurements in the many-electron regime. Here, we operate a foundry-fabricated silicon 2x2 array in the few-electron regime, achieving single-electron occupation in each of the four gate-defined quantum dots, as well as reconfigurable single, double, and triple dots with tunable tunnel couplings. Pulsed-gate and gate-reflectometry techniques permit single-electron manipulation and single-shot charge readout, while the two-dimensionality allows the spatial exchange of electron pairs. The compact form factor of such arrays, whose foundry fabrication can be extended to larger 2xN arrays, along with the recent demonstration of coherent spin control and readout, paves the way for dense qubit arrays for quantum computation and simulation.

cond-mat.mes-hall↗

arXiv2019

All-Electrical Control of an Electron Spin/Valley Quantum Bit in SOI CMOS Technology

We fabricated Quantum Dot (QD) devices using a standard SOI CMOS process flow, and demonstrated that the spin of confined electrons could be controlled via a local electrical-field excitation, owing to inter-valley spin-orbit coupling. We discuss that modulating the confinement geometry via an additional electrode may enable switching a quantum bit (qubit) between an electrically-addressable valley configuration and a protected spin configuration. This proposed scheme bears relevance to improve the trade-off between fast operations and slow decoherence for quantum computing on a Si qubit platform. Finally, we evoke the impact of process-induced variability on the operating bias range.

cond-mat.mes-hall↗

arXiv2018

Characterization and Modeling of 28-nm FDSOI CMOS Technology down to Cryogenic Temperatures

This paper presents an extensive characterization and modeling of a commercial 28-nm FDSOI CMOS process operating down to cryogenic temperatures. The important cryogenic phenomena influencing this technology are discussed. The low-temperature transfer characteristics including body-biasing are modeled over a wide temperature range (room temperature down to 4.2\,K) using the design-oriented simplified-EKV model. The trends of the free-carrier mobilities versus temperature in long and short-narrow devices are extracted from dc measurements down to 1.4\,K and 4.2\,K respectively, using a recently-proposed method based on the output conductance. A cryogenic-temperature-induced mobility degradation is observed on long pMOS, leading to a maximum hole mobility around 77\,K. This work sets the stage for preparing industrial design kits with physics-based cryogenic compact models, a prerequisite for the successful co-integration of FDSOI CMOS circuits with silicon qubits operating at deep-cryogenic temperatures.

cond-mat.mes-hall↗

arXiv2018

Design-oriented Modeling of 28 nm FDSOI CMOS Technology down to 4.2 K for Quantum Computing

In this paper a commercial 28-nm FDSOI CMOS technology is characterized and modeled from room temperature down to 4.2 K. Here we explain the influence of incomplete ionization and interface traps on this technology starting from the fundamental device physics. We then illustrate how these phenomena can be accounted for in circuit device-models. We find that the design-oriented simplified EKV model can accurately predict the impact of the temperature reduction on the transfer characteristics, back-gate sensitivity, and transconductance efficiency. The presented results aim at extending industry-standard compact models to cryogenic temperatures for the design of cryo- CMOS circuits implemented in a 28 nm FDSOI technology.

physics.app-ph↗

arXiv2018

Electrical spin driving by $g$-matrix modulation in spin-orbit qubits

In a semiconductor spin qubit with sizable spin-orbit coupling, coherent spin rotations can be driven by a resonant gate-voltage modulation. Recently, we have exploited this opportunity in the experimental demonstration of a hole spin qubit in a silicon device. Here we investigate the underlying physical mechanisms by measuring the full angular dependence of the Rabi frequency as well as the gate-voltage dependence and anisotropy of the hole $g$-factors. We show that a $g$-matrix formalism can simultaneously capture and discriminate the contributions of two mechanisms so far independently discussed in the literature: one associated with the modulation of the $g$ factors, and measurable by Zeeman energy spectroscopy, the other not. Our approach has a general validity and can be applied to the analysis of other types of spin-orbit qubits.

cond-mat.mes-hall↗

arXiv2018

Electrically driven electron spin resonance mediated by spin-valley-orbit coupling in a silicon quantum dot

The ability to manipulate electron spins with voltage-dependent electric fields is key to the operation of quantum spintronics devices, such as spin-based semiconductor qubits. A natural approach to electrical spin control exploits the spin-orbit coupling (SOC) inherently present in all materials. So far, this approach could not be applied to electrons in silicon, due to their extremely weak SOC. Here we report an experimental realization of electrically driven electron-spin resonance in a silicon-on-insulator (SOI) nanowire quantum dot device. The underlying driving mechanism results from an interplay between SOC and the multi-valley structure of the silicon conduction band, which is enhanced in the investigated nanowire geometry. We present a simple model capturing the essential physics and use tight-binding simulations for a more quantitative analysis. We discuss the relevance of our findings to the development of compact and scalable electron-spin qubits in silicon.

cond-mat.mes-hall↗

arXiv2017

Level spectrum and charge relaxation in a silicon double quantum dot probed by dual-gate reflectometry

We report on dual-gate reflectometry in a metal-oxide-semiconductor double-gate silicon transistor operating at low temperature as a double quantum dot device. The reflectometry setup consists of two radio-frequency resonators respectively connected to the two gate electrodes. By simultaneously measuring their dispersive response, we obtain the complete charge stability diagram of the device. Charge transitions between the two quantum dots and between each quantum dot and either the source or the drain contact are detected through phase shifts in the reflected radio-frequency signals. At finite bias, reflectometry allows probing charge transitions to excited quantum-dot states thereby enabling direct access to the energy level spectra of the quantum dots. Interestingly, we find that in the presence of charge transport across the two dots the reflectometry signatures of interdot transitions display a dip-peak structure containing quantitative information on the charge relaxation rates in the double quantum dot.

cond-mat.mes-hall↗

arXiv2016

Pauli Blockade in a Few-Hole PMOS Double Quantum Dot limited by Spin-Orbit Interaction

We report on hole compact double quantum dots fabricated using conventional CMOS technology. We provide evidence of Pauli spin blockade in the few hole regime which is relevant to spin qubit implementations. A current dip is observed around zero magnetic field, in agreement with the expected behavior for the case of strong spin-orbit. We deduce an intradot spin relaxation rate $\approx$120\,kHz for the first holes, an important step towards a robust hole spin-orbit qubit.

cond-mat.mes-hall↗