arXiv subjects

Hesameddin Ilatikhameneh

Publications and source records attributed to Hesameddin Ilatikhameneh.

At least 19 recordsLinked to original sources

arXiv2020

Doping profile engineered triple heterojunction TFETs with 12 nm body thickness

Triple heterojunction (THJ) TFETs have been proposed to resolve the low ON-current challenge of TFETs. However, the design space for THJ-TFETs is limited by fabrication challenges with respect to device dimensions and material interfaces. This work shows that the original THJ-TFET design with 12 nm body thickness has poor performance, because its sub-threshold swing is 50 mV/dec and the ON-current is only 6 $μA/μm$. To improve the performance, the doping profile of THJ-TFET is engineered to boost the resonant tunneling efficiency. The proposed THJ-TFET design shows a sub-threshold swing of 40 mV/dec over four orders of drain current and an ON-current of 325 uA/um with VGS = 0.3 V. Since THJ-TFETs have multiple quantum wells and material interfaces in the tunneling junction, quantum transport simulations in such devices are complicated. State-of-the-art mode-space quantum transport simulation, including the effect of thermalization and scattering, is employed in this work to optimize THJ-TFET design.

physics.app-ph↗

arXiv2020

Quantum-Kit: Simulating Shor's Factorization of 24-Bit Number on Desktop

Quantum-Kit is a graphical desktop application for quantum circuit simulations. Its powerful, memory-efficient computational engine enables large-scale simulations on a desktop. The ability to design hybrid circuits, with both quantum and classical bits and controls, is employed to demonstrate Kitaev's approach to Shor's factorization algorithm. For the first time, Shor's factorization of a 24-bit integer is simulated with Quantum-Kit in a mere 26 minutes on a modest desktop with Intel Core i5 7400T, 2.4GHz and12GB RAM. While the largest number factorized so far has been a 20-bit integer, requiring 60 qubits and a supercomputer, the hybrid circuit functionality allows the same number to be factorized using Kitaev's trick with only 21 qubits, in 2.3 minutes, on a desktop. Furthermore, conventional Shor's algorithm for a 13-bitinteger with 39 qubits is shown to be 35x faster with Quantum-Kit.

quant-ph↗

arXiv2020

Impact of body thickness and scattering on III-V triple heterojunction Fin-TFET modeled with atomistic mode space approximation

The triple heterojunction TFET has been originally proposed to resolve TFET's low ON-current challenge. The carrier transport in such devices is complicated due to the presence of quantum wells and strong scattering. Hence, the full band atomistic NEGF approach, including scattering, is required to model the carrier transport accurately. However, such simulations for devices with realistic dimensions are computationally unfeasible. To mitigate this issue, we have employed the empirical tight-binding mode space approximation to simulate triple heterojunction TFETs with the body thickness up to 12 nm. The triple heterojunction TFET design is optimized using the model to achieve a sub-60mV/dec transfer characteristic under realistic scattering conditions.

physics.app-ph↗

arXiv2018

Channel thickness optimization for ultra thin and 2D chemically doped TFETs

2D material based tunnel FETs are among the most promising candidates for low power electronics applications since they offer ultimate gate control and high current drives that are achievable through small tunneling distances during the device operation. The ideal device is characterized by a minimized tunneling distance. However, devices with the thinnest possible body do not necessarily provide the best performance. For example, reducing the channel thickness increases the depletion width in the source which can be a significant part of the total tunneling distance. Hence, it is important to determine the optimum channel thickness for each channel material individually. In this work, we study the optimum channel thickness for three channel materials: WSe$_{2}$, Black Phosphorus (BP), and InAs using full-band self-consistent quantum transport simulations. To identify the ideal channel thickness for each material at a specific doping density, a new analytic model is proposed and benchmarked against the numerical simulations.

physics.comp-ph↗

arXiv2017

Robust Mode Space Approach for Atomistic Modeling of Realistically Large Nanowire Transistors

Atomistic quantum transport simulation of realistically large devices is computationally very demanding. The widely used mode space (MS) approach can significantly reduce the numerical cost but good MS basis is usually very hard to obtain for atomistic full-band models. In this work, a robust and parallel algorithm is developed to optimize the MS basis for atomistic nanowires. This enables tight binding non-equilibrium Green's function (NEGF) simulation of nanowire MOSFET with realistic cross section of $\rm 10nm\times10nm$ using a small computer cluster. This approach is applied to compare the performance of InGaAs and Si nanowire nMOSFETs with various channel lengths and cross sections. Simulation results with full-band accuracy indicate that InGaAs nanowire nMOSFETs have no drive current advantage over their Si counterparts for cross sections up to about $\rm 10nm\times10nm$.

cond-mat.mes-hall↗

arXiv2017

Switching Mechanism and the Scalability of vertical-TFETs

In this work, vertical tunnel field-effect transistors (v-TFETs) based on vertically stacked heretojunctions from 2D transition metal dichalcogenide (TMD) materials are studied by atomistic quantum transport simulations. The switching mechanism of v-TFET is found to be different from previous predictions. As a consequence of this switching mechanism, the extension region, where the materials are not stacked over is found to be critical for turning off the v-TFET. This extension region makes the scaling of v-TFETs challenging. In addition, due to the presence of both positive and negative charges inside the channel, v-TFETs also exhibit negative capacitance. As a result, v-TFETs have good energy-delay products and are one of the promising candidates for low power applications.

cond-mat.mtrl-sci↗

arXiv2017

Sensitivity Challenge of Steep Transistors

Steep transistors are crucial in lowering power consumption of the integrated circuits. However, the difficulties in achieving steepness beyond the Boltzmann limit experimentally have hindered the fundamental challenges in application of these devices in integrated circuits. From a sensitivity perspective, an ideal switch should have a high sensitivity to the gate voltage and lower sensitivity to the device design parameters like oxide and body thicknesses. In this work, conventional tunnel-FET (TFET) and negative capacitance FET are shown to suffer from high sensitivity to device design parameters using full-band atomistic quantum transport simulations and analytical analysis. Although Dielectric Engineered (DE-) TFETs based on 2D materials show smaller sensitivity compared with the conventional TFETs, they have leakage issue. To mitigate this challenge, a novel DE-TFET design has been proposed and studied.

cond-mat.mes-hall↗

arXiv2017

Understanding contact gating in Schottky barrier transistors from 2D channels

In this article, a novel two-path model is proposed to quantitatively explain sub-threshold characteristics of back-gated Schottky barrier FETs (SB-FETs) from 2D channel materials. The model integrates the 'conventional' model for SB-FETs with the phenomenon of contact gating - an effect that significantly affects the carrier injection from the source electrode in back-gated field effect transistors. The two-path model is validated by a careful comparison with experimental characteristics obtained from a large number of back-gated WSe2 devices with various channel thicknesses. Our findings are believed to be of critical importance for the quantitative analysis of many three-terminal devices with ultrathin body channels.

cond-mat.mes-hall↗

arXiv2017

Dramatic Impact of Dimensionality on the Electrostatics of PN Junctions

Low dimensional material systems provide a unique set of properties useful for solid-state devices. The building block of these devices is the PN junction. In this work, we present a dramatic difference in the electrostatics of PN junctions in lower dimensional systems, as against the well understood three dimensional systems. Reducing the dimensionality increases the depletion width significantly. We propose a novel method to derive analytic equations in 2D and 1D that considers the impact of neutral regions. The analytical results show an excellent match with both the experimental measurements and numerical simulations. The square root dependence of the depletion width on the ratio of dielectric constant and doping in 3D changes to a linear and exponential dependence for 2D and 1D respectively. This higher sensitivity of 1D PN junctions to its control parameters can be used towards new sensors.

cond-mat.mes-hall↗

arXiv2017

A Multiscale Modeling of Triple-Heterojunction Tunneling FETs

A high performance triple-heterojunction (3HJ) design has been previously proposed for tunneling FETs (TFETs). Compared with single heterojunction (HJ) TFETs, the 3HJ TFETs have both shorter tunneling distance and two transmission resonances that significantly improve the ON-state current ($I_{\rm{ON}}$). Coherent quantum transport simulation predicts, that $I_{\rm{ON}}=460\rm{μA/μm}$ can be achieved at gate length $Lg=15\rm{nm}$, supply voltage $V_{\rm{DD}}=0.3\rm{V}$, and OFF-state current $I_{\rm{OFF}}=1\rm{nA/μm}$. However, strong electron-phonon and electron-electron scattering in the heavily doped leads implies, that the 3HJ devices operate far from the ideal coherent limit. In this study, such scattering effects are assessed by a newly developed multiscale transport model, which combines the ballistic non-equilibrium Green's function method for the channel and the drift-diffusion scattering method for the leads. Simulation results show that the thermalizing scattering in the leads both degrades the 3HJ TFET's subthreshold swing through scattering induced leakage and reduces the turn-on current through the access resistance. Assuming bulk scattering rates and carrier mobilities, the $I_{\rm{ON}}$ is dropped from $460\rm{μA/μm}$ down to $254\rm{μA/μm}$, which is still much larger than the single HJ TFET case.

cond-mat.mes-hall↗

arXiv2017

Combination of equilibrium and non-equilibrium carrier statistics into an atomistic quantum transport model for tunneling hetero-junctions

Tunneling hetero-junctions (THJs) usually induce confined states at the regions close to the tunnel junction which significantly affect their transport properties. Accurate numerical modeling of such effects requires combining the non-equilibrium coherent quantum transport through tunnel junction, as well as the quasi-equilibrium statistics arising from the strong scattering in the induced quantum wells. In this work, a novel atomistic model is proposed to include both effects: the strong scattering in the regions around THJ and the coherent tunneling. The new model matches reasonably well with experimental measurements of Nitride THJ and provides an efficient engineering tool for performance prediction and design of THJ based devices.

cond-mat.mes-hall↗

arXiv2016

Impact of Dimensionality on PN Junctions

Low dimensional material systems provide a unique set of properties useful for solid-state devices. The building block of these devices is the PN junction. In this work, we present a dramatic difference in the electrostatics of PN junctions in lower dimensional systems, as against the well understood three dimensional systems. Reducing the dimensionality increases the fringing fields and depletion width significantly. We propose a novel method to derive analytic equations in 2D and 1D that considers the impact of neutral regions. The analytical results show an excellent match with both the experimental measurements and numerical simulations. The square root dependence of the depletion width on the ratio of dielectric constant and doping in 3D changes to a linear and exponential dependence for 2D and 1D respectively. This higher sensitivity of 1D PN junctions to its control parameters can be used towards new sensors.

cond-mat.mes-hall↗

arXiv2016

Transport in vertically stacked hetero-structures from 2D materials

In this work, the transport of tunnel field-effect transistor (TFET) based on vertically stacked hereto-structures from 2D transition metal dichalcogenide (TMD) materials is investigated by atomistic quantum transport simulations. WTe2-MoS2 combination was chosen due to the formation of a broken gap hetero-junction which is desirable for TFETs. There are two assumptions behind the MoS2-WTe2 hetero-junction tight binding (TB) model: 1) lattice registry. 2) The $S-Te$ parameters being the average of the $S-S$ and $Te-Te$ parameters of bilayer MoS2 and WTe2. The computed TB bandstructure of the hetero-junction agrees well with the bandstructure obtained from density functional theory (DFT) in the energy range of interest for transport. NEGF (Non-Equilibrium Green$'$s Function) equations within the tight binding description is then utilized for device transfer characteristic calculation. Results show 1) energy filtering is the switching mechanism; 2) the length of the extension region is critical for device to turn off; 3) MoS2-WTe2 interlayer TFET can achieve a large on-current of $1000 μA/μm$ with $V_{DD} = 0.3V$, which suggests interlayer TFET can solve the low ON current problem of TFETs and can be a promising candidate for low power applications.

cond-mat.mtrl-sci↗

arXiv2016

Thickness Engineered Tunnel Field-Effect Transistors based on Phosphorene

Thickness engineered tunneling field-effect transistors (TE-TFET) as a high performance ultra-scaled steep transistor is proposed. This device exploits a specific property of 2D materials: layer thickness dependent energy bandgap (Eg). Unlike the conventional hetero-junction TFETs, TE-TFET uses spatially varying layer thickness to form a hetero-junction. This offers advantages by avoiding the interface states and lattice mismatch problems. Furthermore, it boosts the ON-current to 1280$μA/μm$ for 15nm channel length. TE-TFET shows a channel length scalability down to 9nm with constant field scaling $E = V_{DD}/L_{ch}= 30V/nm$. Providing a higher ON current, phosphorene TE-TFET outperforms the homojunction phosphorene TFET and the TMD TFET in terms of extrinsic energy-delay product. In this work, the operation principles of TE-TFET and its performance sensitivity to the design parameters are investigated by the means of full-band atomistic quantum transport simulation.

cond-mat.mes-hall↗

arXiv2016

Saving Moore's Law Down To 1nm Channels With Anisotropic Effective Mass

Scaling transistors' dimensions has been the thrust for the semiconductor industry in the last 4 decades. However, scaling channel lengths beyond 10 nm has become exceptionally challenging due to the direct tunneling between source and drain which degrades gate control, switching functionality, and worsens power dissipation. Fortunately, the emergence of novel classes of materials with exotic properties in recent times has opened up new avenues in device design. Here, we show that by using channel materials with an anisotropic effective mass, the channel can be scaled down to 1nm and still provide an excellent switching performance in both MOSFETs and TFETs. In the case of TFETs, a novel design has been proposed to take advantage of anisotropic mass in both ON- and OFF-state of the TFETs. Full-band atomistic quantum transport simulations of phosphorene nanoribbon MOSFETs and TFETs based on the new design have been performed as a proof.

cond-mat.mes-hall↗

arXiv2016

Configurable Electrostatically Doped High Performance Bilayer Graphene Tunnel FET

A bilayer graphene based electrostatically doped tunnel field-effect transistor (BED-TFET) is proposed in this work. Unlike graphene nanoribbon TFETs in which the edge states deteriorate the OFF-state performance, BED-TFETs operate based on different bandgaps induced by vertical electric fields in the source, channel, and drain regions without any chemical doping. The performance of the transistor is evaluated by self-consistent quantum transport simulations. This device has several advantages: 1) ultra-low power (VDD=0.1V), 2) high performance (ION/IOFF>104), 3) steep subthreshold swing (SS<10mv/dec), and 4) electrically configurable between N-TFET and P-TFET post fabrication. Here, the operation principle of the BED-TFET and its performance sensitivity to the device design parameters are studied.

cond-mat.mes-hall↗

arXiv2016

Design Rules for High Performance Tunnel Transistors from 2D Materials

Tunneling field-effect transistors (TFETs) based on 2D materials are promising steep sub-threshold swing (SS) devices due to their tight gate control. There are two major methods to create the tunnel junction in these 2D TFETs: electrical and chemical doping. In this work, design guidelines for both electrically and chemically doped 2D TFETs are provided using full band atomistic quantum transport simulations in conjunction with analytic modeling. Moreover, several 2D TFETs' performance boosters such as strain, source doping, and equivalent oxide thickness (EOT) are studied. Later on, these performance boosters are analyzed within a novel figure-of-merit plot (i.e. constant ON-current plot).

cond-mat.mes-hall↗

arXiv2016

Simulation and optimization of HEMTs

We have developed a simulation system for nanoscale high-electron mobility transistors, in which the self-consistent solution of Poisson and Schrödinger equations is obtained with the finite element method. We solve the exact set of nonlinear differential equations to obtain electron wave function, electric potential distribution, electron density, Fermi surface energy and current density distribution in the whole body of the device. For more precision, local dependence of carrier mobility on the electric field distribution is considered. We furthermore compare the simulation to a recent experimental measurement and observe perfect agreement. We also propose a graded channel design to improve the transconductance and thereby the threshold frequency of the device.

cond-mat.mes-hall↗