arXiv subjects

J. Joshua Yang

Publications and source records attributed to J. Joshua Yang.

8 recordsLinked to original sources

arXiv2024

Roadmap for Unconventional Computing with Nanotechnology

In the "Beyond Moore's Law" era, with increasing edge intelligence, domain-specific computing embracing unconventional approaches will become increasingly prevalent. At the same time, adopting a variety of nanotechnologies will offer benefits in energy cost, computational speed, reduced footprint, cyber resilience, and processing power. The time is ripe for a roadmap for unconventional computing with nanotechnologies to guide future research, and this collection aims to fill that need. The authors provide a comprehensive roadmap for neuromorphic computing using electron spins, memristive devices, two-dimensional nanomaterials, nanomagnets, and various dynamical systems. They also address other paradigms such as Ising machines, Bayesian inference engines, probabilistic computing with p-bits, processing in memory, quantum memories and algorithms, computing with skyrmions and spin waves, and brain-inspired computing for incremental learning and problem-solving in severely resource-constrained environments. These approaches have advantages over traditional Boolean computing based on von Neumann architecture. As the computational requirements for artificial intelligence grow 50 times faster than Moore's Law for electronics, more unconventional approaches to computing and signal processing will appear on the horizon, and this roadmap will help identify future needs and challenges. In a very fertile field, experts in the field aim to present some of the dominant and most promising technologies for unconventional computing that will be around for some time to come. Within a holistic approach, the goal is to provide pathways for solidifying the field and guiding future impactful discoveries.

cs.ET↗

arXiv2022

2022 Roadmap on Neuromorphic Computing and Engineering

Modern computation based on the von Neumann architecture is today a mature cutting-edge science. In the Von Neumann architecture, processing and memory units are implemented as separate blocks interchanging data intensively and continuously. This data transfer is responsible for a large part of the power consumption. The next generation computer technology is expected to solve problems at the exascale with 1018 calculations each second. Even though these future computers will be incredibly powerful, if they are based on von Neumann type architectures, they will consume between 20 and 30 megawatts of power and will not have intrinsic physically built-in capabilities to learn or deal with complex data as our brain does. These needs can be addressed by neuromorphic computing systems which are inspired by the biological concepts of the human brain. This new generation of computers has the potential to be used for the storage and processing of large amounts of digital information with much lower power consumption than conventional processors. Among their potential future applications, an important niche is moving the control from data centers to edge devices. The aim of this Roadmap is to present a snapshot of the present state of neuromorphic technology and provide an opinion on the challenges and opportunities that the future holds in the major areas of neuromorphic technology, namely materials, devices, neuromorphic circuits, neuromorphic algorithms, applications, and ethics. The Roadmap is a collection of perspectives where leading researchers in the neuromorphic community provide their own view about the current state and the future challenges. We hope that this Roadmap will be a useful resource to readers outside this field, for those who are just entering the field, and for those who are well established in the neuromorphic community. https://doi.org/10.1088/2634-4386/ac4a83

cs.ET↗

arXiv2020

Gate-tunable van der Waals heterostructure for reconfigurable neural network vision sensor

Early processing of visual information takes place in the human retina. Mimicking neurobiological structures and functionalities of the retina provide a promising pathway to achieving vision sensor with highly efficient image processing. Here, we demonstrate a prototype vision sensor that operates via the gate-tunable positive and negative photoresponses of the van der Waals (vdW) vertical heterostructures. The sensor emulates not only the neurobiological functionalities of bipolar cells and photoreceptors but also the unique synaptic connectivity between bipolar cells and photoreceptors. By tuning gate voltage for each pixel, we achieve reconfigurable vision sensor for simultaneously image sensing and processing. Furthermore, our prototype vision sensor itself can be trained to classify the input images, via updating the gate voltages applied individually to each pixel in the sensor. Our work indicates that vdW vertical heterostructures offer a promising platform for the development of neural network vision sensor.

cond-mat.mtrl-sci↗

arXiv2019

Harnessing Intrinsic Noise in Memristor Hopfield Neural Networks for Combinatorial Optimization

We describe a hybrid analog-digital computing approach to solve important combinatorial optimization problems that leverages memristors (two-terminal nonvolatile memories). While previous memristor accelerators have had to minimize analog noise effects, we show that our optimization solver harnesses such noise as a computing resource. Here we describe a memristor-Hopfield Neural Network (mem-HNN) with massively parallel operations performed in a dense crossbar array. We provide experimental demonstrations solving NP-hard max-cut problems directly in analog crossbar arrays, and supplement this with experimentally-grounded simulations to explore scalability with problem size, providing the success probabilities, time and energy to solution, and interactions with intrinsic analog noise. Compared to fully digital approaches, and present-day quantum and optical accelerators, we forecast the mem-HNN to have over four orders of magnitude higher solution throughput per power consumption. This suggests substantially improved performance and scalability compared to current quantum annealing approaches, while operating at room temperature and taking advantage of existing CMOS technology augmented with emerging analog non-volatile memristors.

cs.ET↗

arXiv2018

Nanoscale compositional evolution in complex oxide based resistive memories

Functional oxides based resistive memories are recognized as potential candidate for the next-generation high density data storage and neuromorphic applications. Fundamental understanding of the compositional changes in the functional oxides is required to tune the resistive switching characteristics for enhanced memory performance. Herein, we present the micro/nano-structural and compositional changes induced in a resistive oxide memory during resistive switching. Oxygen deficient amorphous chromium doped strontium titanate (Cr:$a$-SrTiO$_{3-x}$) based resistance change memories are fabricated in a Ti/Cr:$a$-SrTiO$_{3-x}$ heterostructure and subjected to different biasing conditions to set memory states. Transmission electron microscope based cross-sectional analyses of the memory devices in different memory states shows that the micro/nano-structural changes in amorphous complex oxide and associated redox processes define the resistive switching behavior. These experimental results provide insights and supporting material for Ref. [1].

cond-mat.mtrl-sci↗

arXiv2018

Long short-term memory networks in memristor crossbars

Recent breakthroughs in recurrent deep neural networks with long short-term memory (LSTM) units has led to major advances in artificial intelligence. State-of-the-art LSTM models with significantly increased complexity and a large number of parameters, however, have a bottleneck in computing power resulting from limited memory capacity and data communication bandwidth. Here we demonstrate experimentally that LSTM can be implemented with a memristor crossbar, which has a small circuit footprint to store a large number of parameters and in-memory computing capability that circumvents the 'von Neumann bottleneck'. We illustrate the capability of our system by solving real-world problems in regression and classification, which shows that memristor LSTM is a promising low-power and low-latency hardware platform for edge inference.

cs.ET↗

arXiv2018

Memristor Crossbars with 4.5 Terabits-per-Inch-Square Density and Two Nanometer Dimension

Memristor is a promising building block for the next generation nonvolatile random access memory and bio-inspired computing systems. Organizing memristors into high density crossbar arrays, although challenging, is critical to meet the ever-growing high capacity and low energy demands of these applications especially in the big data era. Here, we construct memristor crossbars with a single-layer density up to 4.5 terabits per inch square, an order of magnitude denser than the state- of-the-art 64-layer triple level cell NAND flash technology. The memristors in the crossbars are 2 $\times$ 2 nm$^2$ in size, capable of switching with tens of nano ampere electric current. The densely packed memristor crossbars of extremely small working devices provides a power-efficient solution for high density information storage and processing.

cond-mat.mes-hall↗

arXiv2018

Robust memristors based on layered two-dimensional materials

Van der Waals heterostructure based on layered two-dimensional (2D) materials offers unprecedented opportunities to create materials with atomic precision by design. By combining superior properties of each component, such heterostructure also provides possible solutions to address various challenges of the electronic devices, especially those with vertical multilayered structures. Here, we report the realization of robust memristors for the first time based on van der Waals heterostructure of fully layered 2D materials (graphene/MoS2-xOx/graphene) and demonstrate a good thermal stability lacking in traditional memristors. Such devices have shown excellent switching performance with endurance up to 107 and a record-high operating temperature up to 340oC. By combining in situ high-resolution TEM and STEM studies, we have shown that the MoS2-xOx switching layer, together with the graphene electrodes and their atomically sharp interfaces, are responsible for the observed thermal stability at elevated temperatures. A well-defined conduction channel and a switching mechanism based on the migration of oxygen ions were also revealed. In addition, the fully layered 2D materials offer a good mechanical flexibility for flexible electronic applications, manifested by our experimental demonstration of a good endurance against over 1000 bending cycles. Our results showcase a general and encouraging pathway toward engineering desired device properties by using 2D van der Waals heterostructures.

cond-mat.mtrl-sci↗