Searcharxiv⌕ Search

arXiv subjects

Kerem Y. Camsari

Publications and source records attributed to Kerem Y. Camsari.

At least 55 records · Page 3Linked to original sources

Physics-inspired Ising Computing with Ring Oscillator Activated p-bits

The nearing end of Moore's Law has been driving the development of domain-specific hardware tailored to solve a special set of problems. Along these lines, probabilistic computing with inherently stochastic building blocks (p-bits) have shown significant promise, particularly in the context of hard optimization and statistical sampling problems. p-bits have been proposed and demonstrated in different hardware substrates ranging from small-scale stochastic magnetic tunnel junctions (sMTJs) in asynchronous architectures to large-scale CMOS in synchronous architectures. Here, we design and implement a truly asynchronous and medium-scale p-computer (with $\approx$ 800 p-bits) that closely emulates the asynchronous dynamics of sMTJs in Field Programmable Gate Arrays (FPGAs). Using hard instances of the planted Ising glass problem on the Chimera lattice, we evaluate the performance of the asynchronous architecture against an ideal, synchronous design that performs parallelized (chromatic) exact Gibbs sampling. We find that despite the lack of any careful synchronization, the asynchronous design achieves parallelism with comparable algorithmic scaling in the ideal, carefully tuned and parallelized synchronous design. Our results highlight the promise of massively scaled p-computers with millions of free-running p-bits made out of nanoscale building blocks such as stochastic magnetic tunnel junctions.

cs.AR↗

Massively Parallel Probabilistic Computing with Sparse Ising Machines

Inspired by the developments in quantum computing, building domain-specific classical hardware to solve computationally hard problems has received increasing attention. Here, by introducing systematic sparsification techniques, we demonstrate a massively parallel architecture: the sparse Ising Machine (sIM). Exploiting sparsity, sIM achieves ideal parallelism: its key figure of merit - flips per second - scales linearly with the number of probabilistic bits (p-bit) in the system. This makes sIM up to 6 orders of magnitude faster than a CPU implementing standard Gibbs sampling. Compared to optimized implementations in TPUs and GPUs, sIM delivers 5-18x speedup in sampling. In benchmark problems such as integer factorization, sIM can reliably factor semiprimes up to 32-bits, far larger than previous attempts from D-Wave and other probabilistic solvers. Strikingly, sIM beats competition-winning SAT solvers (by 4-700x in runtime to reach 95% accuracy) in solving 3SAT problems. Even when sampling is made inexact using faster clocks, sIM can find the correct ground state with further speedup. The problem encoding and sparsification techniques we introduce can be applied to other Ising Machines (classical and quantum) and the architecture we present can be used for scaling the demonstrated 5,000-10,000 p-bits to 1,000,000 or more through analog CMOS or nanodevices.

cs.ET↗

Hardware-aware $in \ situ$ Boltzmann machine learning using stochastic magnetic tunnel junctions

One of the big challenges of current electronics is the design and implementation of hardware neural networks that perform fast and energy-efficient machine learning. Spintronics is a promising catalyst for this field with the capabilities of nanosecond operation and compatibility with existing microelectronics. Considering large-scale, viable neuromorphic systems however, variability of device properties is a serious concern. In this paper, we show an autonomously operating circuit that performs hardware-aware machine learning utilizing probabilistic neurons built with stochastic magnetic tunnel junctions. We show that $in \ situ$ learning of weights and biases in a Boltzmann machine can counter device-to-device variations and learn the probability distribution of meaningful operations such as a full adder. This scalable autonomously operating learning circuit using spintronics-based neurons could be especially of interest for standalone artificial-intelligence devices capable of fast and efficient learning at the edge.

cond-mat.mes-hall↗

Quantitative Evaluation of Hardware Binary Stochastic Neurons

Recently there has been increasing activity to build dedicated Ising Machines to accelerate the solution of combinatorial optimization problems by expressing these problems as a ground-state search of the Ising model. A common theme of such Ising Machines is to tailor the physics of underlying hardware to the mathematics of the Ising model to improve some aspect of performance that is measured in speed to solution, energy consumption per solution or area footprint of the adopted hardware. One such approach to build an Ising spin, or a binary stochastic neuron (BSN), is a compact mixed-signal unit based on a low-barrier nanomagnet based design that uses a single magnetic tunnel junction (MTJ) and three transistors (3T-1MTJ) where the MTJ functions as a stochastic resistor (1SR). Such a compact unit can drastically reduce the area footprint of BSNs while promising massive scalability by leveraging the existing Magnetic RAM (MRAM) technology that has integrated 1T-1MTJ cells in ~Gbit densities. The 3T-1SR design however can be realized using different materials or devices that provide naturally fluctuating resistances. Extending previous work, we evaluate hardware BSNs from this general perspective by classifying necessary and sufficient conditions to design a fast and energy-efficient BSN that can be used in scaled Ising Machine implementations. We connect our device analysis to systems-level metrics by emphasizing hardware-independent figures-of-merit such as flips per second and dissipated energy per random bit that can be used to classify any Ising Machine.

cs.ET↗

Double Free-Layer Magnetic Tunnel Junctions for Probabilistic Bits

Naturally random devices that exploit ambient thermal noise have recently attracted attention as hardware primitives for accelerating probabilistic computing applications. One such approach is to use a low barrier nanomagnet as the free layer of a magnetic tunnel junction (MTJ) whose magnetic fluctuations are converted to resistance fluctuations in the presence of a stable fixed layer. Here, we propose and theoretically analyze a magnetic tunnel junction with no fixed layers but two free layers that are circularly shaped disk magnets. We use an experimentally benchmarked model that accounts for finite temperature magnetization dynamics, bias-dependent charge and spin-polarized currents as well as the dipolar coupling between the free layers. We obtain analytical results for statistical averages of fluctuations that are in good agreement with the numerical model. We find that the free layers with low diameters fluctuate to randomize the resistance of the MTJ in an approximately bias-independent manner. We show how such MTJs can be used to build a binary stochastic neuron (or a p-bit) in hardware. Unlike earlier stochastic MTJs that need to operate at a specific bias point to produce random fluctuations, the proposed design can be random for a wide range of bias values, independent of spin-transfer-torque pinning. Moreover, in the absence of a carefully optimized stabled fixed layer, the symmetric double-free layer stack can be manufactured using present day Magnetoresistive Random Access Memory (MRAM) technology by minimal changes to the fabrication process. Such devices can be used as hardware accelerators in energy-efficient computing schemes that require a large throughput of tunably random bits.

cond-mat.mes-hall↗

The Non-Equilibrium Green Function (NEGF) Method

The Non-Equilibrium Green Function (NEGF) method was established in the 1960's through the classic work of Schwinger, Kadanoff, Baym, Keldysh and others using many-body perturbation theory (MBPT) and the diagrammatic theory for non-equilibrium processes. Much of the literature is based on the original MBPT-based approach and this makes it inaccessible to those unfamiliar with advanced quantum statistical mechanics. We obtain the NEGF equations directly from a one-electron Schrödinger equation using relatively elementary arguments. These equations have been used to discuss many problems of great interest such as quantized conductance, (integer) quantum Hall effect, Anderson localization, resonant tunneling and spin transport without a systematic treatment of many-body effects. But it goes beyond purely coherent transport allowing us to include phase-breaking interactions (both momentum-relaxing and momentum-conserving as well as spin-conserving and spin-relaxing) within a self-consistent Born approximation. We believe that the scope and utility of the NEGF equations transcend the MBPT-based approach originally used to derive it. NEGF teaches us how to combine quantum dynamics with "contacts" much as Boltzmann taught us how to combine classical dynamics with "contacts", using the word contacts in a broad, figurative sense to denote all kinds of entropy-driven processes. We believe that this approach to "contact-ing" the Schrödinger equation should be of broad interest to anyone working on device physics or non-equilibrium statistical mechanics in general.

cond-mat.mes-hall↗

Autonomous Probabilistic Coprocessing with Petaflips per Second

In this paper we present a concrete design for a probabilistic (p-) computer based on a network of p-bits, robust classical entities fluctuating between -1 and +1, with probabilities that are controlled through an input constructed from the outputs of other p-bits. The architecture of this probabilistic computer is similar to a stochastic neural network with the p-bit playing the role of a binary stochastic neuron, but with one key difference: there is no sequencer used to enforce an ordering of p-bit updates, as is typically required. Instead, we explore \textit{sequencerless} designs where all p-bits are allowed to flip autonomously and demonstrate that such designs can allow ultrafast operation unconstrained by available clock speeds without compromising the solution's fidelity. Based on experimental results from a hardware benchmark of the autonomous design and benchmarked device models, we project that a nanomagnetic implementation can scale to achieve petaflips per second with millions of neurons. A key contribution of this paper is the focus on a hardware metric $-$ flips per second $-$ as a problem and substrate-independent figure-of-merit for an emerging class of hardware annealers known as Ising Machines. Much like the shrinking feature sizes of transistors that have continually driven Moore's Law, we believe that flips per second can be continually improved in later technology generations of a wide class of probabilistic, domain specific hardware.

cs.ET↗

Hardware Design for Autonomous Bayesian Networks

Directed acyclic graphs or Bayesian networks that are popular in many AI related sectors for probabilistic inference and causal reasoning can be mapped to probabilistic circuits built out of probabilistic bits (p-bits), analogous to binary stochastic neurons of stochastic artificial neural networks. In order to satisfy standard statistical results, individual p-bits not only need to be updated sequentially, but also in order from the parent to the child nodes, necessitating the use of sequencers in software implementations. In this article, we first use SPICE simulations to show that an autonomous hardware Bayesian network can operate correctly without any clocks or sequencers, but only if the individual p-bits are appropriately designed. We then present a simple behavioral model of the autonomous hardware illustrating the essential characteristics needed for correct sequencer-free operation. This model is also benchmarked against SPICE simulations and can be used to simulate large scale networks. Our results could be useful in the design of hardware accelerators that use energy efficient building blocks suited for low-level implementations of Bayesian networks. The autonomous massively parallel operation of our proposed stochastic hardware has biological relevance since neural dynamics in brain is also stochastic and autonomous by nature.

cs.ET↗

Probabilistic Circuits for Autonomous Learning: A simulation study

Modern machine learning is based on powerful algorithms running on digital computing platforms and there is great interest in accelerating the learning process and making it more energy efficient. In this paper we present a fully autonomous probabilistic circuit for fast and efficient learning that makes no use of digital computing. Specifically we use SPICE simulations to demonstrate a clockless autonomous circuit where the required synaptic weights are read out in the form of analog voltages. Such autonomous circuits could be particularly of interest as standalone learning devices in the context of mobile and edge computing.

cs.ET↗

Subnanosecond Fluctuations in Low-Barrier Nanomagnets

Fast magnetic fluctuations due to thermal torques have useful technological functionality ranging from cryptography to probabilistic computing. The characteristic time of fluctuations in typical uniaxial anisotropy magnets studied so far is bounded from below by the well-known energy relaxation mechanism. This time scales as $α^{-1}$, where $α$ parameterizes the strength of dissipative processes. Here, we theoretically analyze the fluctuating dynamics in easy-plane and antiferromagnetically coupled nanomagnets. We find in such magnets, the dynamics are strongly influenced by fluctuating intrinsic fields, which give rise to an additional dephasing-type mechanism for washing out correlations. In particular, we establish two time scales for characterizing fluctuations (i) the average time for a nanomagnet to reverse|which for the experimentally relevant regime of low damping is governed primarily by dephasing and becomes independent of $α$, (ii) the time scale for memory loss of a single nanomagnet|which scales as $α^{-1/3}$ and is governed by a combination of energy dissipation and dephasing mechanism. For typical experimentally accessible values of intrinsic fields, the resultant thermal-fluctuation rate is increased by multiple orders of magnitude when compared with the bound set solely by the energy relaxation mechanism in uniaxial magnets. This could lead to higher operating speeds of emerging devices exploiting magnetic fluctuations.

cond-mat.mes-hall↗

Scalable Emulation of Sign-Problem$-$Free Hamiltonians with Room Temperature p-bits

The growing field of quantum computing is based on the concept of a q-bit which is a delicate superposition of 0 and 1, requiring cryogenic temperatures for its physical realization along with challenging coherent coupling techniques for entangling them. By contrast, a probabilistic bit or a p-bit is a robust classical entity that fluctuates between 0 and 1, and can be implemented at room temperature using present-day technology. Here, we show that a probabilistic coprocessor built out of room temperature p-bits can be used to accelerate simulations of a special class of quantum many-body systems that are sign-problem$-$free or stoquastic, leveraging the well-known Suzuki-Trotter decomposition that maps a $d$-dimensional quantum many body Hamiltonian to a $d$+1-dimensional classical Hamiltonian. This mapping allows an efficient emulation of a quantum system by classical computers and is commonly used in software to perform Quantum Monte Carlo (QMC) algorithms. By contrast, we show that a compact, embedded MTJ-based coprocessor can serve as a highly efficient hardware-accelerator for such QMC algorithms providing several orders of magnitude improvement in speed compared to optimized CPU implementations. Using realistic device-level SPICE simulations we demonstrate that the correct quantum correlations can be obtained using a classical p-circuit built with existing technology and operating at room temperature. The proposed coprocessor can serve as a tool to study stoquastic quantum many-body systems, overcoming challenges associated with physical quantum annealers.

quant-ph↗

The promise of spintronics for unconventional computing

Novel computational paradigms may provide the blueprint to help solving the time and energy limitations that we face with our modern computers, and provide solutions to complex problems more efficiently (with reduced time, power consumption and/or less device footprint) than is currently possible with standard approaches. Spintronics offers a promising basis for the development of efficient devices and unconventional operations for at least three main reasons: (i) the low-power requirements of spin-based devices, i.e., requiring no standby power for operation and the possibility to write information with small dynamic energy dissipation, (ii) the strong nonlinearity, time nonlocality, and/or stochasticity that spintronic devices can exhibit, and (iii) their compatibility with CMOS logic manufacturing processes. At the same time, the high endurance and speed of spintronic devices means that they can be rewritten or reconfigured frequently over the lifetime of a circuit, a feature that is essential in many emerging computing concepts. In this perspective, we will discuss how spintronics may aid in the realization of efficient devices primarily based on magnetic tunnel junctions and how those devices can impact in the development of three unconventional computing paradigms, namely, reservoir computing, probabilistic computing and memcomputing that in our opinion may be used to address some limitations of modern computers, providing a realistic path to intelligent hybrid CMOS-spintronic systems.

physics.app-ph↗

Correlated fluctuations in spin orbit torque-coupled perpendicular nanomagnets

Low barrier nanomagnets have attracted a lot of research interest for their use as sources of high quality true random number generation. More recently, low barrier nanomagnets with tunable output have been shown to be a natural hardware platform for unconventional computing paradigms such as probabilistic spin logic. Efficient generation and tunability of high quality random bits is critical for these novel applications. However, current spintronic random number generators are based on superparamagnetic tunnel junctions (SMTJs) with tunability obtained through spin transfer torque (STT), which unavoidably leads to challenges in designing concatenated networks using these two terminal devices. The more recent development of utilizing spin orbit torque (SOT) allows for a three terminal device design, but can only tune in-plane magnetization freely, which is not very energy efficient due to the needs of overcoming a large demagnetization field. In this work, we experimentally demonstrate for the first time, a stochastic device with perpendicular magnetic anisotropy (PMA) that is completely tunable by SOT without the aid of any external magnetic field. Our measurements lead us to hypothesize that a tilted anisotropy might be responsible for the observed tunability. We carry out stochastic Landau-Lifshitz-Gilbert (sLLG) simulations to confirm our experimental observation. Finally, we build an electrically coupled network of two such stochastic nanomagnet based devices and demonstrate that finite correlation or anti-correlation can be established between their output fluctuations by a weak interconnection, despite having a large difference in their natural fluctuation time scale. Simulations based on a newly developed dynamical model for autonomous circuits composed of low barrier nanomagnets show close agreement with the experimental results.

physics.app-ph↗

Non-Equilibrium Green's Function based Circuit Models for Coherent Spin Devices

With recent developments in spintronics, it is now possible to envision spin-driven devices with magnets and interconnects that require a new class of transport models using generalized Fermi functions and currents, each with four components: one for charge and three for spin. The corresponding impedance elements are not pure numbers but $4\times4$ matrices. Starting from the Non-Equilibrium Green's Function (NEGF) formalism in the elastic, phase-coherent transport regime, we develop spin generalized Landauer-Büttiker formulas involving such $4\times 4$ conductances, for multi-terminal devices in the presence of Normal-Metal (NM) leads. In addition to usual terminal conductances describing currents at the contacts, we provide spin-transfer torque conductances describing the spin currents absorbed by ferromagnetic (FM) regions inside the conductor, specifying both of these currents in terms of Fermi functions at the terminals. We derive universal sum rules and reciprocity relations that would be obeyed by such matrix conductances. Finally, we apply our formulation to two example Hamiltonians describing the Rashba and the Hanle effect in 2D. Our results allows the use of pure quantum transport models as building blocks in constructing circuit models for complex spintronic and nano-magnetic structures and devices for simulation in SPICE-like simulators.

cond-mat.mes-hall↗

Rectification in Spin-Orbit Materials Using Low Energy Barrier Magnets

The coupling of spin-orbit materials to high energy barrier ($\sim$40-60 $k_BT$) nano-magnets has attracted growing interest for exciting new physics and various spintronic applications. We predict that a coupling between the spin-momentum locking (SML) observed in spin-orbit materials and low-energy barrier magnets (LBM) should exhibit a unique multi-terminal rectification for arbitrarily small amplitude channel currents. The basic idea is to measure the charge current induced spin accumulation in the SML channel in the form of a magnetization dependent voltage using an LBM, either with an in-plane or perpendicular anisotropy (IMA or PMA). The LBM feels an instantaneous spin-orbit torque due to the accumulated spins in the channel which causes the average magnetization to follow the current, leading to the non-linear rectification. We discuss the frequency band of this multi-terminal rectification which can be understood in terms of the angular momentum conservation in the LBM. For a fixed spin-current from the SML channel, the frequency band is same for LBMs with IMA and PMA, as long as they have the same total magnetic moment in a given volume. The proposed all-metallic structure could find application as highly sensitive passive rf detectors and as energy harvesters from weak ambient sources where standard technologies may not operate.

cond-mat.mes-hall↗

Low Barrier Magnet Design for Efficient Hardware Binary Stochastic Neurons

Binary stochastic neurons (BSN's) form an integral part of many machine learning algorithms, motivating the development of hardware accelerators for this complex function. It has been recognized that hardware BSN's can be implemented using low barrier magnets (LBM's) by minimally modifying present-day magnetoresistive random access memory (MRAM) devices. A crucial parameter that determines the response of these LBM based BSN designs is the \emph{correlation time} of magnetization, $τ_c$. In this letter, we show that for magnets with low energy barriers ($Δ\approx k_BT$ and below), circular disk magnets with in-plane magnetic anisotropy (IMA) lead to $τ_c$ values that are two orders of magnitude smaller compared to $τ_c$ for magnets having perpendicular magnetic anisotropy (PMA) and provide analytical descriptions. We show that this striking difference in $τ_c$ is due to a precession-like fluctuation mechanism that is enabled by the large demagnetization field in IMA magnets. We provide a detailed energy-delay performance evaluation of previously proposed BSN designs based on Spin-Orbit-Torque (SOT) MRAM and Spin-Transfer-Torque (STT) MRAM employing low barrier circular IMA magnets by SPICE simulations. The designs exhibit sub-ns response times leading to energy requirements of $\sim$a few fJ to evaluate the BSN function, orders of magnitude lower than digital CMOS implementations with a much larger footprint. While modern MRAM technology is based on PMA magnets, results in this paper suggest that low barrier circular IMA magnets may be more suitable for this application.

cs.ET↗

p-Bits for Probabilistic Spin Logic

We introduce the concept of a probabilistic or p-bit, intermediate between the standard bits of digital electronics and the emerging q-bits of quantum computing. We show that low barrier magnets or LBM's provide a natural physical representation for p-bits and can be built either from perpendicular magnets (PMA) designed to be close to the in-plane transition or from circular in-plane magnets (IMA). Magnetic tunnel junctions (MTJ) built using LBM's as free layers can be combined with standard NMOS transistors to provide three-terminal building blocks for large scale probabilistic circuits that can be designed to perform useful functions. Interestingly, this three-terminal unit looks just like the 1T/MTJ device used in embedded MRAM technology, with only one difference: the use of an LBM for the MTJ free layer. We hope that the concept of p-bits and p-circuits will help open up new application spaces for this emerging technology. However, a p-bit need not involve an MTJ, any fluctuating resistor could be combined with a transistor to implement it, while completely digital implementations using conventional CMOS technology are also possible. The p-bit also provides a conceptual bridge between two active but disjoint fields of research, namely stochastic machine learning and quantum computing. First, there are the applications that are based on the similarity of a p-bit to the binary stochastic neuron (BSN), a well-known concept in machine learning. Three-terminal p-bits could provide an efficient hardware accelerator for the BSN. Second, there are the applications that are based on the p-bit being like a poor man's q-bit. Initial demonstrations based on full SPICE simulations show that several optimization problems including quantum annealing are amenable to p-bit implementations which can be scaled up at room temperature using existing technology.

cs.ET↗

Voltage-driven Building Block for Hardware Belief Networks

Probabilistic spin logic (PSL), based on networks of binary stochastic neurons (or p-bits), has been shown to provide a viable framework for many functionalities including Ising computing, Bayesian inference, invertible Boolean logic and image recognition. This paper presents a hardware building block for the PSL architecture, consisting of an embedded MTJ and a capacitive voltage adder of the type used in neuMOS. We use SPICE simulations to show how identical copies of these building blocks (or weighted p-bits) can be interconnected with wires to design and solve a small instance of the NP-complete Subset Sum Problem fully in hardware.

cs.ET↗