arXiv subjects

L. M. K. Vandersypen

Publications and source records attributed to L. M. K. Vandersypen.

At least 19 recordsLinked to original sources

arXiv2026

Spin qubit operations by conveyor-mode shuttling

Dynamic qubit routing is emerging as a promising architectural path for semiconductor quantum processors. Charge carriers can be rapidly moved around on a chip using traveling-wave potentials known as conveyors, preserving the spin state with high fidelity. Originally developed for spin transport, conveyor-mode shuttling may also offer opportunities for performing qubit operations directly controlled by the motion itself. Here, we demonstrate coherent single- and two-qubit control by conveyor-mode electron shuttling, using two conceptually different approaches. First, conveyor electric-dipole spin resonance (conveyor EDSR) achieves high-fidelity rotations by resonantly shuttling spins through transverse magnetic-field gradients at their mean Larmor frequency. Second, conveyor diabatic gates exploit quantization-axis tilts for tunable bang-bang control. Combining diabatic conveyor transport with exchange activation controlled by the motion directly yields a variety of effective two-qubit interactions selectable via the shuttling speed and distance. These experimental results motivate an architectural paradigm of reconfigurable and transport-driven spin qubits.

cond-mat.mes-hall↗

arXiv2025

Spin-orbit-enabled realization of arbitrary two-qubit gates on moving spins

Shuttling spin qubits in systems with large spin-orbit interaction (SOI) can cause errors during motion. However, in this work, we demonstrate that SOI can be harnessed to implement an arbitrary high-fidelity two-qubit (2Q) gate. We consider two spin qubits defined in a semiconductor double quantum dot that are smoothly moved toward each other by gate voltages. We show that an arbitrary high-fidelity 2Q gate can be realized by controlling the shuttling speed and waiting times, and leveraging strong intrinsic or extrinsic SOI. Crucially, performing 2Q operations during qubit transport enables a one-step realization of a wide range of 2Q gates, which often involve several steps when implemented using static dots. Our findings establish a practical route toward direct implementation of any 2Q gate via spin shuttling, significantly reducing control overhead in scalable quantum computing architectures.

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arXiv2025

Operating semiconductor qubits without individual barrier gates

Semiconductor spin qubits have emerged as a promising platform for quantum computing, following a significant improvement in their control fidelities over recent years. Increasing the qubit count remains challenging, beginning with the fabrication of small features and complex fanouts. A particular challenge has been formed by the need for individual barrier gates to control the exchange interaction between adjacent spin qubits. Here, we propose a method to vary two-qubit interactions without applying pulses on individual barrier gates while also remaining insensitive to detuning noise in first order. Experimentally we find that changing plunger gate voltages over 300 mV can tune the exchange energy $J$ from 100 kHz to 60 MHz. This allows us to perform two-qubit operations without changing the barrier gate voltage. Based on these findings we conceptualize a spin qubit architecture without individual barrier gates, simplifying the fabrication while maintaining the control necessary for universal quantum computation.

cond-mat.mes-hall↗

arXiv2025

Running a six-qubit quantum circuit on a silicon spin qubit array

The simplicity of encoding a qubit in the state of a single electron spin and the potential for their integration into industry-standard microchips continue to drive the field of semiconductor-based quantum computing. However, after decades of progress, validating universal logic in these platforms has advanced little beyond first-principles demonstrations of meeting the DiVincenzo criteria. Case in point, and specifically for silicon-based quantum dots, three-qubit algorithms have been the upper limit to date, despite the availability of devices containing more qubits. In this work, we fully exploit the capacity of a spin-qubit array and implement a six qubit quantum circuit, the largest utilizing semiconductor quantum technology. By programming the quantum processor, we execute quantum circuits across all permutations of three, four, five, and six neighbouring qubits, demonstrating successful programmable multi-qubit operation throughout the array. The results reveal that, despite the high quality of individual units, errors quickly accumulate when combining all of them in a quantum circuit. This work highlights the necessity to minimize idling times through simultaneous operations, boost dephasing times, and consistently improve state preparation and measurement fidelities.

quant-ph↗

arXiv2023

Exciton transport in a germanium quantum dot ladder

Quantum systems with engineered Hamiltonians can be used as simulators of many-body physics problems to provide insights beyond the capabilities of classical computers. Semiconductor gate-defined quantum dot arrays have emerged as a versatile platform for quantum simulation of generalized Fermi-Hubbard physics, one of the richest playgrounds in condensed matter physics. In this work, we employ a germanium 4$\times$2 quantum dot array and show that the naturally occurring long-range Coulomb interaction can lead to exciton formation and transport. We tune the quantum dot ladder into two capacitively-coupled channels and exploit Coulomb drag to probe the binding of electrons and holes. Specifically, we shuttle an electron through one leg of the ladder and observe that a hole is dragged along in the second leg under the right conditions. This corresponds to a transition from single-electron transport in one leg to exciton transport along the ladder. Our work paves the way for the study of excitonic states of matter in quantum dot arrays.

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arXiv2022

Reducing charge noise in quantum dots by using thin silicon quantum wells

Charge noise in the host semiconductor degrades the performance of spin-qubits and poses an obstacle to control large quantum processors. However, it is challenging to engineer the heterogeneous material stack of gate-defined quantum dots to improve charge noise systematically. Here, we address the semiconductor-dielectric interface and the buried quantum well of a $^{28}$Si/SiGe heterostructure and show the connection between charge noise, measured locally in quantum dots, and global disorder in the host semiconductor, measured with macroscopic Hall bars. In 5 nm thick $^{28}$Si quantum wells, we find that improvements in the scattering properties and uniformity of the two-dimensional electron gas over a 100 mm wafer correspond to a significant reduction in charge noise, with a minimum value of 0.29$\pm$0.02 $μ$eV/sqrt(Hz) at 1 Hz averaged over several quantum dots. We extrapolate the measured charge noise to simulated dephasing times to cz-gate fidelities that improve nearly one order of magnitude. These results point to a clean and quiet crystalline environment for integrating long-lived and high-fidelity spin qubits into a larger system.

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arXiv2022

Shuttling an electron spin through a silicon quantum dot array

Coherent links between qubits separated by tens of micrometers are expected to facilitate scalable quantum computing architectures for spin qubits in electrically-defined quantum dots. These links create space for classical on-chip control electronics between qubit arrays, which can help to alleviate the so-called wiring bottleneck. A promising method of achieving coherent links between distant spin qubits consists of shuttling the spin through an array of quantum dots. Here, we use a linear array of four tunnel-coupled quantum dots in a 28Si/SiGe heterostructure to create a short quantum link. We move an electron spin through the quantum dot array by adjusting the electrochemical potential for each quantum dot sequentially. By pulsing the gates repeatedly, we shuttle an electron forward and backward through the array up to 250 times, which corresponds to a total distance of approximately 80 μm. We make an estimate of the spin-flip probability per hop in these experiments and conclude that this is well below 0.01% per hop.

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arXiv2021

Quantum simulation of antiferromagnetic Heisenberg chain with gate-defined quantum dots

Quantum-mechanical correlations of interacting fermions result in the emergence of exotic phases. Magnetic phases naturally arise in the Mott-insulator regime of the Fermi-Hubbard model, where charges are localized and the spin degree of freedom remains. In this regime, the occurrence of phenomena such as resonating valence bonds, frustrated magnetism, and spin liquids is predicted. Quantum systems with engineered Hamiltonians can be used as simulators of such spin physics to provide insights beyond the capabilities of analytical methods and classical computers. To be useful, methods for the preparation of intricate many-body spin states and access to relevant observables are required. Here, we show the quantum simulation of magnetism in the Mott-insulator regime with a linear quantum-dot array. We characterize the energy spectrum for a Heisenberg spin chain, from which we can identify when the conditions for homogeneous exchange couplings are met. Next, we study the multispin coherence with global exchange oscillations in both the singlet and triplet subspace of the Heisenberg Hamiltonian. Last, we adiabatically prepare the low-energy global singlet of the homogeneous spin chain and probe it with two-spin singlettriplet measurements on each nearest-neighbor pair and the correlations therein. The methods and control presented here open new opportunities for the simulation of quantum magnetism benefiting from the flexibility in tuning and layout of gate-defined quantum-dot arrays.

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arXiv2021

Qubits made by advanced semiconductor manufacturing

Full-scale quantum computers require the integration of millions of quantum bits. The promise of leveraging industrial semiconductor manufacturing to meet this requirement has fueled the pursuit of quantum computing in silicon quantum dots. However, to date, their fabrication has relied on electron-beam lithography and, with few exceptions, on academic style lift-off processes. Although these fabrication techniques offer process flexibility, they suffer from low yield and poor uniformity. An important question is whether the processing conditions developed in the manufacturing fab environment to enable high yield, throughput, and uniformity of transistors are suitable for quantum dot arrays and do not compromise the delicate qubit properties. Here, we demonstrate quantum dots hosted at a 28Si/28SiO2 interface, fabricated in a 300 mm semiconductor manufacturing facility using all-optical lithography and fully industrial processing. As a result, we achieve nanoscale gate patterns with remarkable homogeneity. The quantum dots are well-behaved in the multi-electron regime, with excellent tunnel barrier control, a crucial feature for fault-tolerant two-qubit gates. Single-spin qubit operation using magnetic resonance reveals relaxation times of over 1 s at 1 Tesla and coherence times of over 3 ms, matching the quality of silicon spin qubits reported to date. The feasibility of high-quality qubits made with fully-industrial techniques strongly enhances the prospects of a large-scale quantum computer

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arXiv2021

Radio frequency reflectometry in silicon-based quantum dots

RF reflectometry offers a fast and sensitive method for charge sensing and spin readout in gated quantum dots. We focus in this work on the implementation of RF readout in accumulation-mode gate-defined quantum dots, where the large parasitic capacitance poses a challenge. We describe and test two methods for mitigating the effect of the parasitic capacitance, one by on-chip modifications and a second by off-chip changes. We demonstrate that these methods enable high-performance charge readout in Si/SiGe quantum dots, achieving a fidelity of 99.9% for a measurement time of 1 $μ$s.

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arXiv2020

High-fidelity two-qubit gates in silicon above one Kelvin

Spin qubits in quantum dots define an attractive platform for scalable quantum information because of their compatibility with semiconductor manufacturing, their long coherence times, and the ability to operate at temperatures exceeding one Kelvin. Qubit logic can be implemented by pulsing the exchange interaction or via driven rotations. Here, we show that these approaches can be combined to execute a multitude of native two-qubit gates in a single device, reducing the operation overhead to perform quantum algorithms. We demonstrate, at a temperature above one Kelvin, single-qubit rotations together with the two-qubit gates CROT, CPHASE and SWAP. Furthermore we realize adiabatic, diabatic and composite sequences to optimize the qubit control fidelity and the gate time. We find two-qubit gates that can be executed within 67 ns and by theoretically analyzing the experimental noise sources we predict fidelities exceeding 99%. This promises fault-tolerant operation using quantum hardware that can be embedded with classical electronics for quantum integrated circuits.

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arXiv2020

Low percolation density and charge noise with holes in germanium

We engineer planar Ge/SiGe heterostructures for low disorder and quiet hole quantum dot operation by positioning the strained Ge channel 55~nm below the semiconductor/dielectric interface. In heterostructure field effect transistors, we measure a percolation density for two-dimensional hole transport of $2.1\times10^{10}~\text{cm}^{-2}$, indicative of a very low disorder potential landscape experienced by holes in the buried Ge channel. These Ge heterostructures support quiet operation of hole quantum dots and we measure charge noise levels that are below the detection limit $\sqrt{S_\text{E}}=0.2~μ\text{eV}/\sqrt{\text{Hz}}$ at 1 Hz. These results establish planar Ge as a promising platform for scaled two-dimensional spin qubit arrays.

cond-mat.mes-hall↗

arXiv2020

On-chip Integration of Si/SiGe-based Quantum Dots and Switched-capacitor Circuits

Solid-state qubits integrated on semiconductor substrates currently require at least one wire from every qubit to the control electronics, leading to a so-called wiring bottleneck for scaling. Demultiplexing via on-chip circuitry offers an effective strategy to overcome this bottleneck. In the case of gate-defined quantum dot arrays, specific static voltages need to be applied to many gates simultaneously to realize electron confinement. When a charge-locking structure is placed between the quantum device and the demultiplexer, the voltage can be maintained locally. In this study, we implement a switched-capacitor circuit for charge-locking and use it to float the plunger gate of a single quantum dot. Parallel plate capacitors, transistors and quantum dot devices are monolithically fabricated on a Si/SiGe-based substrate to avoid complex off-chip routing. We experimentally study the effects of the capacitor and transistor size on the voltage accuracy of the floating node. Furthermore, we demonstrate that the electrochemical potential of the quantum dot can follow a 100 Hz pulse signal while the dot is partially floating, which is essential for applying this strategy in qubit experiments.

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arXiv2020

Electron cascade for spin readout

Electrons confined in semiconductor quantum dot arrays have both charge and spin degrees of freedom. The spin provides a well-controllable and long-lived qubit implementation. The charge configuration in the dot array is influenced by Coulomb repulsion, and the same interaction enables charge sensors to probe this configuration. Here we show that the Coulomb repulsion allows an initial charge transition to induce subsequent charge transitions, inducing a cascade of electron hops, like toppling dominoes. A cascade can transmit information along a quantum dot array over a distance that extends by far the effect of the direct Coulomb repulsion. We demonstrate that a cascade of electrons can be combined with Pauli spin blockade to read out spins using a remote charge sensor. We achieve > 99.9% spin readout fidelity in 1.7 $\mathrmμ$s. The cascade-based readout enables operation of a densely-packed two-dimensional quantum dot array with charge sensors placed at the periphery. The high connectivity of such arrays greatly improves the capabilities of quantum dot systems for quantum computation and simulation.

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arXiv2020

Efficient orthogonal control of tunnel couplings in a quantum dot array

Electrostatically-defined semiconductor quantum dot arrays offer a promising platform for quantum computation and quantum simulation. However, crosstalk of gate voltages to dot potentials and inter-dot tunnel couplings complicates the tuning of the device parameters. To date, crosstalk to the dot potentials is routinely and efficiently compensated using so-called virtual gates, which are specific linear combinations of physical gate voltages. However, due to exponential dependence of tunnel couplings on gate voltages, crosstalk to the tunnel barriers is currently compensated through a slow iterative process. In this work, we show that the crosstalk on tunnel barriers can be efficiently characterized and compensated for, using the fact that the same exponential dependence applies to all gates. We demonstrate efficient calibration of crosstalk in a quadruple quantum dot array and define a set of virtual barrier gates, with which we show orthogonal control of all inter-dot tunnel couplings. Our method marks a key step forward in the scalability of the tuning process of large-scale quantum dot arrays.

cond-mat.mes-hall↗

arXiv2020

Tunable coupling and isolation of single electrons in silicon metal-oxide-semiconductor quantum dots

Extremely long coherence times, excellent single-qubit gate fidelities and two-qubit logic have been demonstrated with silicon metal-oxide-semiconductor spin qubits, making it one of the leading platforms for quantum information processing. Despite this, a long-standing challenge in this system has been the demonstration of tunable tunnel coupling between single electrons. Here we overcome this hurdle with gate-defined quantum dots and show couplings that can be tuned on and off for quantum operations. We use charge sensing to discriminate between the (2,0) and (1,1) charge states of a double quantum dot and show excellent charge sensitivity. We demonstrate tunable coupling up to 13 GHz, obtained by fitting charge polarization lines, and tunable tunnel rates down to below 1 Hz, deduced from the random telegraph signal. The demonstration of tunable coupling between single electrons in a silicon metal-oxide-semiconductor device provides significant scope for high-fidelity two-qubit logic toward quantum information processing with standard manufacturing.

cond-mat.mes-hall↗

arXiv2019

Universal quantum logic in hot silicon qubits

Quantum computation requires many qubits that can be coherently controlled and coupled to each other. Qubits that are defined using lithographic techniques are often argued to be promising platforms for scalability, since they can be implemented using semiconductor fabrication technology. However, leading solid-state approaches function only at temperatures below 100 mK, where cooling power is extremely limited, and this severely impacts the perspective for practical quantum computation. Recent works on spins in silicon have shown steps towards a platform that can be operated at higher temperatures by demonstrating long spin lifetimes, gate-based spin readout, and coherent single-spin control, but the crucial two-qubit logic gate has been missing. Here we demonstrate that silicon quantum dots can have sufficient thermal robustness to enable the execution of a universal gate set above one Kelvin. We obtain single-qubit control via electron-spin-resonance (ESR) and readout using Pauli spin blockade. We show individual coherent control of two qubits and measure single-qubit fidelities up to 99.3 %. We demonstrate tunability of the exchange interaction between the two spins from 0.5 up to 18 MHz and use this to execute coherent two-qubit controlled rotations (CROT). The demonstration of `hot' and universal quantum logic in a semiconductor platform paves the way for quantum integrated circuits hosting the quantum hardware and their control circuitry all on the same chip, providing a scalable approach towards practical quantum information.

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arXiv2019

Quantum Dot Arrays in Silicon and Germanium

Electrons and holes confined in quantum dots define an excellent building block for quantum emergence, simulation, and computation. In order for quantum electronics to become practical, large numbers of quantum dots will be required, necessitating the fabrication of scaled structures such as linear and 2D arrays. Group IV semiconductors contain stable isotopes with zero nuclear spin and can thereby serve as excellent host for spins with long quantum coherence. Here we demonstrate group IV quantum dot arrays in silicon metal-oxide-semiconductor (SiMOS), strained silicon (Si/SiGe) and strained germanium (Ge/SiGe). We fabricate using a multi-layer technique to achieve tightly confined quantum dots and compare integration processes. While SiMOS can benefit from a larger temperature budget and Ge/SiGe can make ohmic contact to metals, the overlapping gate structure to define the quantum dots can be based on a nearly identical integration. We realize charge sensing in each platform, for the first time in Ge/SiGe, and demonstrate fully functional linear and two-dimensional arrays where all quantum dots can be depleted to the last charge state. In Si/SiGe, we tune a quintuple quantum dot using the N+1 method to simultaneously reach the few electron regime for each quantum dot. We compare capacitive cross talk and find it to be the smallest in SiMOS, relevant for the tuning of quantum dot arrays. These results constitute an excellent base for quantum computation with quantum dots and provide opportunities for each platform to be integrated with standard semiconductor manufacturing.

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