arXiv subjects

M. Fernando Gonzalez-Zalba

Publications and source records attributed to M. Fernando Gonzalez-Zalba.

At least 19 recordsLinked to original sources

arXiv2026

Fast On-Chip Thermometry with TiN Kinetic Inductance Resonators in 22 nm Process Technology

Understanding the temporal and spatial dependence of temperature is critical in high-performance cryogenic devices. Typical thermometry techniques struggle to simultaneously combine high bandwidth, sensitivity and on-chip integration, limiting their ability to measure fast intra-device thermal fluctuations. Here, we demonstrate a time-resolved thermometry platform based on TiN kinetic inductance resonators integrated in a 22 nm FDSOI chip. By tracking temperature-dependent shifts in the resonant frequency, we achieve sub-millikelvin temperature sensitivity down to temperatures of 100 mK. Time-resolved on-chip pulsed heating experiments as a function of distance reveal an onset delay, consistent with a quasi-ballistic heat propagation velocity of 3.9 ${\pm}$ 0.1 mm $μ$s${}^{-1}$. We also show that elevated temperatures increase net thermal conductance, shortening thermal relaxation times across all spatial separations. This behaviour manifests in two distinct regimes: a substrate-limited regime at 100 mK, where cooling rates vary with heater distance, and a Kapitza boundary-limited regime at 400 mK, where thermal relaxation becomes more spatially uniform. These measurements demonstrate kinetic inductance thermometry's ability to rapidly probe non-equilibrium temperature dynamics in cryogenic devices such as quantum processors.

quant-ph↗

arXiv2026

A Superconducting Phase Transition Single-Electron Transistor

Quantum computers require fast and accurate methods for qubit state detection. Phase-transition sensors exploit the abrupt change between two physical states of a material to achieve enhanced sensitivity and have enabled advanced detectors for quantum technologies, such as superconducting nanowire single-photon detectors. However, this sensing principle has not yet been applied to semiconductor spin qubits. Here, we demonstrate a superconducting phase-transition radio-frequency single-electron transistor (PTSET), a charge sensor for semiconductor spin qubits whose response is enhanced by a superconducting-to-normal phase transition. The transition is engineered by linking the sensor current to a low-critical-current, high-kinetic-inductance inductor integrated into the radio-frequency matching network. We demonstrate improvements in sensitivity of one and two orders of magnitude over conventional rfSETs in the large- and small-signal regimes, respectively. Our results establish phase-transition sensing as a route towards ultrasensitive, integrated charge sensors for semiconductor quantum computing and point to broader applications, including cryogenic photon detection for radio astronomy.

quant-ph↗

arXiv2026

Radiofrequency cascade readout of coupled spin qubits

Silicon spin qubits based on metal-oxide-semiconductor (MOS) technology are compatible with semiconductor manufacturing and offer a route to scalable quantum processing. However, spin readout typically relies on proximal charge sensors, which add architectural complexity and limit qubit connectivity. In situ dispersive readout techniques are more compact, which can alleviate these constraints, but exhibit limited sensitivity. Here we report a radiofrequency electron-cascade readout method that enhances the dispersive signal through alternating-current electron co-tunnelling. With this approach, we achieve an enhancement in signal-to-noise ratio of more than $35~$dB, leading to a minimum integration time of $7.6 \pm 0.2~μ$s. We demonstrate singlet-triplet readout of two-electron spins in a natural silicon planar MOS quantum dot array, and coherent spin control using the exchange interaction, which forms the basis for entangling gates. We find dephasing times of up to $500~$ns and a gate quality factor that exceeds 10.

cond-mat.mes-hall↗

arXiv2026

A current source with metrological precision made on a 300mm silicon MOS process

Although the measurement of current is now defined with respect to the electronic charge, producing a current standard based on a single-electron source remains challenging. The error rate of a source must be below 0.01 ppm, and many such sources must be operated in parallel to provide practically useful values of current in the nanoampere range. Achieving a single electron source using an industrial grade 300 mm wafer silicon metal oxide semiconductor (MOS) process could offer a powerful route for scaling, combined with the ability for integration with control and measurement electronics. Here, we present measurements of such a single-electron source indicating an error rate of 0.008 ppm, below the error threshold to satisfy the SI Ampere, and one of the lowest error rates reported, implemented using a gate-defined quantum dot device fabricated on an industry-grade silicon MOS process. Further evidence supporting the accuracy of the device is obtained by comparing the device performance to established models of quantum tunnelling, which reveal the mechanism of operation of our source at the single particle level. The low error rate observed in this device motivates the development of scaled arrays of parallel sources utilising Si MOS devices to realise a new generation of metrologically accurate current standards.

cond-mat.mes-hall↗

arXiv2025

Spin Readout in a 22 nm Node Integrated Circuit

Constructing a quantum computer capable of broad and important applications is likely to require millions of addressable physical qubits, posing the challenge of large-scale integration of quantum systems with classical electronics. Fully depleted silicon-on-insulator CMOS technology has been used to develop a range of cryogenic electronic components for the control and readout of different qubit modalities interfaced on separate chips. However, recent measurements of quantum dots on this technology raise the tantalising prospect of realising control electronics and spin qubits on the same manufacturing platform, within a single integrated circuit (IC). Here, we demonstrate single-shot spin readout in addressable quantum dot devices within an IC fabricated using industry-standard 22 nm fully depleted silicon-on-insulator technology. We achieve spin-to-charge conversion via a ramped energy-selective measurement, detected using a radio-frequency single-electron transistor and addressed by on-chip cryogenic electronics. The observation of consistent readout visibilities exceeding 90% and millisecond spin relaxation times in two nominally identical devices within the addressable array supports the reproducibility of the unit cell. The successful observation of spin readout using this CMOS process marks a key step towards realising highly scalable and integrated spin qubits.

quant-ph↗

arXiv2025

Harnessing electron motion for global spin qubit control

Silicon spin qubits are promising candidates for building scalable quantum computers due to their nanometre scale features. However, delivering microwave control signals locally to each qubit poses a challenge and instead methods that utilise global control fields have been proposed. These require tuning the frequency of selected qubits into resonance with a global field while detuning the rest to avoid crosstalk. Common frequency tuning methods, such as electric-field-induced Stark shift, are insufficient to cover the frequency variability across large arrays of qubits. Here, we argue that electron motion, and especially the recently demonstrated high-fidelity shuttling, can be leveraged to enhance frequency tunability. Our conclusions are supported by numerical simulations proving its efficiency on concrete architectures such as a 2$\times$N array of qubits and the recently introduced looped pipeline architecture. Specifically, we show that the use of our schemes enables single-qubit fidelity improvements up to a factor of 100 compared to the state-of-the-art. Finally, we show that our scheme can naturally be extended to perform two-qubit gates globally.

quant-ph↗

arXiv2025

Electrical readout of spins in the absence of spin blockade

In semiconductor nanostructures, spin blockade (SB) is the most scalable mechanism for electrical spin readout, requiring only two bound spins for its implementation. In conjunction with charge sensing techniques, SB has led to high-fidelity readout of spins in semiconductor-based quantum processors. However, various mechanisms may lift SB, such as strong spin-orbit coupling (SOC) or low-lying excited states, hence posing challenges to perform spin readout at scale and with high fidelity in such systems. Here, we present a method, based on the dependence of the two-spin system polarizability on energy detuning, to perform spin state readout even when SB lifting mechanisms are dominant. It leverages SB lifting as a resource to detect selectively different spin measurement outcomes. We demonstrate the method using a hybrid system formed by a quantum dot (QD) and a Boron acceptor in a silicon p-type transistor and show spin-selective readout of different spin states under SB lifting conditions due to (i) SOC and (ii) low-lying orbital states in the QD. We further use the method to determine the detuning-dependent spin relaxation time of 0.1 - 8 $μ$s. Our method should help perform projective spin measurements with high spin-to-charge conversion fidelity in systems subject to strong SOC, will facilitate state leakage detection and enable complete readout of two-spin states.

cond-mat.mes-hall↗

arXiv2025

Large-scale characterization of Single-Hole Transistors in 22-nm FDSOI CMOS Technology

State-of-the-art quantum processors have recently grown to reach 100s of physical qubits. As the number of qubits continues to grow, new challenges associated with scaling arise, such as device variability reduction and integration with cryogenic electronics for I/O management. Spin qubits in silicon quantum dots provide a platform where these problems may be mitigated, having demonstrated high control and readout fidelities and compatibility with large-scale manufacturing techniques of the semiconductor industry. Here, we demonstrate the monolithic integration of 384 p-type quantum dots, each embedded in a silicon transistor, with on-chip digital and analog electronics, all operating at deep cryogenic temperatures. The chip is fabricated using 22-nm fully-depleted silicon-on-insulator (FDSOI) CMOS technology. We extract key quantum dot parameters by fast readout and automated machine learning routines to determine the link between device dimensions and quantum dot yield, variability, and charge noise figures. Overall, our results demonstrate a path to monolithic integration of quantum and classical electronics at scale.

cond-mat.mes-hall↗

arXiv2025

High-fidelity dispersive spin sensing in a tuneable unit cell of silicon MOS quantum dots

Metal-oxide-semiconductor (MOS) technology is a promising platform for developing quantum computers based on spin qubits. Scaling this approach will benefit from compact and sensitive sensors that minimize constraints on qubit connectivity while being industrially manufacturable. Here, we demonstrate a compact dispersive spin-qubit sensor, a single-electron box (SEB), within a bilinear unit cell of planar MOS quantum dots (QDs) fabricated using an industrial grade 300 mm wafer process. By independent gate control of the SEB and double-quantum-dot tunnel rates, we optimize the sensor to achieve a readout fidelity of 99.92% in 340us (99% in 20us), fidelity values on a par with the best obtained with less compact sensors. Furthermore, we develop a Hidden Markov Model of the two-electron spin dynamics that enables a more accurate calculation of the measurement outcome and hence readout fidelity. Our results show how high-fidelity sensors can be introduced within silicon spin-qubit architectures while maintaining sufficient qubit connectivity as well as providing faster readout and more efficient initialisation schemes.

quant-ph↗

arXiv2025

Compact Quantum Dot Models for Analog Microwave co-Simulation

Scalable solid-state quantum computers will require integration with analog and digital electronics. Efficiently simulating the quantum-classical electronic interface is hence of paramount importance. Here, we present Verilog-A compact models with a focus on quantum-dot-based systems, relevant to semiconductor- and Majorana-based quantum computing. Our models are capable of faithfully reproducing coherent quantum behavior within a standard electronic circuit simulator, enabling compromise-free co-simulation of hybrid quantum devices. In particular, we present results from co-simulations performed in Cadence Spectre, showcasing coherent quantum phenomena in circuits with both quantum and classical components using an industry-standard electronic design and automation tool. Our work paves the way for a new paradigm in the design of quantum systems, which leverages the many decades of development of electronic computer-aided design and automation tools in the semiconductor industry to now simulate and optimize quantum processing units, quantum-classical interfaces, and hybrid quantum-analog circuits.

quant-ph↗

arXiv2025

An Integrated Deep-Cryogenic Temperature Sensor in CMOS Technology for Quantum Computing Applications

On-chip thermometry at deep-cryogenic temperatures is vital in quantum computing applications to accurately quantify the effect of increased temperature on qubit performance. In this work, we present a sub-1 K temperature sensor in CMOS technology based on the temperature dependence of the critical current of a superconducting (SC) thin-film. The sensor is implemented in 22-nm fully depleted silicon on insulator (FDSOI) technology and comprises a 6 nA resolution current-output digital-to-analog converter (DAC), a transimpedance amplifier (TIA) with a SC thin-film as a gain element, and a voltage comparator. The circuit dissipates 1.5 uW and is demonstrated operating at ambient temperatures as low as 15 mK, providing a variable temperature resolution reaching sub-10 mK.

quant-ph↗

arXiv2024

A Multi-Module Silicon-On-Insulator Chip Assembly Containing Quantum Dots and Cryogenic Radio-Frequency Readout Electronics

Quantum processing units will be modules of larger information processing systems containing also digital and analog electronics modules. Silicon-based quantum computing offers the enticing opportunity to manufacture all the modules using the same technology platform. Here, we present a cryogenic multi-module assembly for multiplexed readout of silicon quantum devices where all modules have been fabricated using the same fully-depleted silicon-on-insulator (FDSOI) CMOS process. The assembly is constituted by three chiplets: (i) a low-noise amplifier (LNA), (ii) a single-pole eight-throw switch (SP8T), and (iii) a silicon quantum dot (QD) array. We integrate the chiplets into modules and show respectively, (i) a peak gain over 35dB with a 3dB bandwidth from 709MHz to 827MHz and an average noise temperature of 6.2K (minimum 4.2K), (ii) an insertion loss smaller than 1.1dB and a noise temperature less than 1.1K over the 0-2GHz range, and (iii) single-electron box (SEB) charge sensors. Finally, we combine all modules into a single demonstration showing time-domain radio-frequency multiplexing of two SEBs paving the way to an all-silicon quantum computing system.

quant-ph↗

arXiv2024

Polarimetry With Spins in the Solid State

The ability for optically active media to rotate the polarization of light is the basis of polarimetry, an illustrious technique responsible for many breakthroughs in fields as varied as astronomy, medicine and material science. Here, we recast the primary mechanism for spin readout in semiconductor-based quantum computers, Pauli spin-blockade (PSB), as the natural extension of polarimetry to the third dimension. We perform polarimetry with spins through a silicon quantum dot exchanging a hole with a boron acceptor, demonstrating the role of spin-orbit coupling in creating spin misalignment. Perfect spin alignment may be recovered by means of rotating the applied magnetic-field orientation. This work shows how spin misalignment sets a fundamental upper limit for the spin readout fidelity in quantum-computing systems based on PSB.

cond-mat.mes-hall↗

arXiv2024

Floquet interferometry of a dressed semiconductor quantum dot

A quantum system interacting with a time-periodic excitation creates a ladder of hybrid eigenstates in which the system is mixed with an increasing number of photons. This mechanism, referred to as dressing, has been observed in the context of light-matter interaction in systems as varied as atoms, molecules and solid-state qubits. In this work, we demonstrate state dressing in a semiconductor quantum dot tunnel-coupled to a charge reservoir. We observe the emergence of a Floquet ladder of states in the system's high-frequency electrical response, manifesting as interference fringes at the multiphoton resonances despite the system lacking an avoided crossing. We study the dressed quantum dot while changing reservoir temperature, charge lifetime, and excitation amplitude and reveal the fundamental nature of the mechanism by developing a theory based on the quantum dynamics of the Floquet ladder, which is in excellent agreement with the data. Furthermore, we show how the technique finds applications in the accurate electrostatic characterisation of semiconductor quantum dots.

cond-mat.mes-hall↗

arXiv2024

Multi-module microwave assembly for fast read-out and charge noise characterization of silicon quantum dots

Fast measurements of quantum devices is important in areas such as quantum sensing, quantum computing and nanodevice quality analysis. Here, we develop a superconductor-semiconductor multi-module microwave assembly to demonstrate charge state readout at the state-of-the-art. The assembly consist of a superconducting readout resonator interfaced to a silicon-on-insulator (SOI) chiplet containing quantum dots (QDs) in a high-$κ$ nanowire transistor. The superconducting chiplet contains resonant and coupling elements as well as $LC$ filters that, when interfaced with the silicon chip, result in a resonant frequency $f=2.12$ GHz, a loaded quality factor $Q=850$, and a resonator impedance $Z=470$ $Ω$. Combined with the large gate lever arms of SOI technology, we achieve a minimum integration time for single and double QD transitions of 2.77 ns and 13.5 ns, respectively. We utilize the assembly to measure charge noise over 9 decades of frequency up to 500 kHz and find a 1/$f$ dependence across the whole frequency spectrum as well as a charge noise level of 4 $μ$eV/$\sqrt{\text{Hz}}$ at 1 Hz. The modular microwave circuitry presented here can be directly utilized in conjunction with other quantum device to improve the readout performance as well as enable large bandwidth noise spectroscopy, all without the complexity of superconductor-semiconductor monolithic fabrication.

cond-mat.mes-hall↗

arXiv2023

Rapid cryogenic characterisation of 1024 integrated silicon quantum dots

Quantum computers are nearing the thousand qubit mark, with the current focus on scaling to improve computational performance. As quantum processors grow in complexity, new challenges arise such as the management of device variability and the interface with supporting electronics. Spin qubits in silicon quantum dots are poised to address these challenges with their proven control fidelities and potential for compatibility with large-scale integration. Here, we demonstrate the integration of 1024 silicon quantum dots with on-chip digital and analogue electronics, all operating below 1 K. A high-frequency analogue multiplexer provides fast access to all devices with minimal electrical connections, enabling characteristic data across the quantum dot array to be acquired in just 5 minutes. We achieve this by leveraging radio-frequency reflectometry with state-of-the-art signal integrity, reaching a minimum integration time of 160 ps. Key quantum dot parameters are extracted by fast automated machine learning routines to assess quantum dot yield and understand the impact of device design. We find correlations between quantum dot parameters and room temperature transistor behaviour that may be used as a proxy for in-line process monitoring. Our results show how rapid large-scale studies of silicon quantum devices can be performed at lower temperatures and measurement rates orders of magnitude faster than current probing techniques, and form a platform for the future on-chip addressing of large scale qubit arrays.

quant-ph↗

arXiv2023

Measurement of cryoelectronics heating using a local quantum dot thermometer in silicon

Silicon technology offers the enticing opportunity for monolithic integration of quantum and classical electronic circuits. However, the power consumption levels of classical electronics may compromise the local chip temperature and hence the fidelity of qubit operations. Here, we utilize a quantum-dot-based thermometer embedded in an industry-standard silicon field-effect transistor (FET), to assess the local temperature increase produced by an active FET placed in close proximity. We study the impact of both static and dynamic operation regimes. When the FET is operated statically, we find a power budget of 45 nW at 100 nm separation whereas at 216 $μ$m the power budget raises to 150 $μ$W. When operated dynamically, we observe negligible temperature increase for the switch frequencies tested up to 10 MHz. Our work describes a method to accurately map out the available power budget at a distance from a solid-state quantum processor and indicate under which conditions cryoelectronics circuits may allow the operation of hybrid quantum-classical systems.

cond-mat.mes-hall↗

arXiv2023

CMOS on-chip thermometry at deep cryogenic temperatures

Accurate on-chip temperature sensing is critical for the optimal performance of modern CMOS integrated circuits (ICs), to understand and monitor localized heating around the chip during operation. The development of quantum computers has stimulated much interest in ICs operating a deep cryogenic temperatures (typically 0.01 - 4 K), in which the reduced thermal conductivity of silicon and silicon oxide, and the limited cooling power budgets make local on-chip temperature sensing even more important. Here, we report four different methods for on-chip temperature measurements native to complementary metal-oxide-semiconductor (CMOS) industrial fabrication processes. These include secondary and primary thermometry methods and cover conventional thermometry structures used at room temperature as well as methods exploiting phenomena which emerge at cryogenic temperatures, such as superconductivity and Coulomb blockade. We benchmark the sensitivity of the methods as a function of temperature and use them to measure local excess temperature produced by on-chip heating elements. Our results demonstrate thermometry methods that may be readily integrated in CMOS chips with operation from the milliKelivin range to room temperature.

physics.app-ph↗