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Michael Wiebusch

Publications and source records attributed to Michael Wiebusch.

4 recordsLinked to original sources

A Low-Complexity 200 Mbit/s Full-Duplex Digital Link Over a Single Coaxial Cable for Laboratory Instrumentation

Modern full-duplex communication systems, such as Gigabit Ethernet, enable high data rates over challenging transmission media but require sophisticated circuitry and non-trivial digital interfaces. For laboratory instrumentation, the objective may instead be to achieve moderate-bandwidth full-duplex communication over short, well-controlled coaxial cables with minimal circuit and interface complexity. We present a low-complexity bidirectional digital interconnect that enables simultaneous transmission and reception of baseband logic signals over a single coaxial cable. The circuit combines a discrete passive resistive hybrid providing line termination and directional separation, a single logic gate as line driver, and a commercial differential receiver used as a comparator. No modulation, transformer coupling, adaptive calibration, or active analog or digital echo cancellation is required. The design target is full-duplex operation at 200 MBit/s over 10 m of standard RG-178 cable. An analytical treatment of the hybrid network determines the system parameter that maximizes the differential signal amplitude at the receiver, while circuit simulations predict the deterministic timing errors resulting from imperfect directional separation. Experimental measurements confirm the predicted deterministic jitter and show good agreement with the simulation results. For typical laboratory coaxial cables up to 10 m, the measured peak-to-peak edge timing error remains below 1.2 ns. A bidirectional transmission experiment with randomized data demonstrates a clearly open eye diagram. It was found that the transceiver inherently provides loopback functionality when the transmission line is left open. The proposed approach provides a simple, protocol-independent bidirectional physical link which may be useful in laboratory instrumentation where cable routing is constrained.

physics.ins-det

Design and Implementation of a Compact Analog Constant Fraction Discriminator for High-Resolution Timing in Gamma-Ray Spectroscopy

This work presents a custom analog front-end card designed for the read-out of PMTs coupled to lanthanum bromide scintillators. It integrates 16 discrete analog constant fraction discriminators (CFDs) on a compact 12x10 cm board, providing precise timing information for nuclear lifetime measurements. The design emphasizes cost-effectiveness, utilizing off-the-shelf discrete components, as well as compactness, achieved by using miniature coaxial connectors and cables as delay elements. The focus of this paper lies on the unusual and extremely minimalist analog shaper/discriminator design which is devised without operational amplifiers, making use of only a handful of RF transistors and LVDS receivers in place of comparators.

physics.ins-det

A Custom Discrete Amplifier-Shaper-Discriminator Circuit for the Drift Chambers of the R3B Experiment at GSI

This contribution presents a pragmatic approach to read-out electronics for drift chambers used in particle physics experiments, specifically for the R3B experiment at GSI. The design uses discrete miniature SMD components and LVDS inputs of a low-cost FPGA to achieve a performance similar to classic ASIC solutions to the problem. The circuit comprises a high gain, low noise amplifier, a custom signal shaper, tailored to the specifics of proportional counter signals, and a leading-edge discriminator with programmable threshold. The presented approach offers an attractive solution for small to medium sized detector systems that require specialized read-out electronics but cannot afford the high cost and development effort associated with ASICs.

physics.ins-det

Towards new Front-End Electronics for the HADES Drift Chamber System

Operating HADES at the future FAIR SIS-100 accelerator challenges the rate capability of DAQ and electronics. A new, more robust version of front-end electronics needs to be built for the HADES drift chamber system. Due to the unavailability of the previously used ASD-8 analog read-out ASIC, PASTTREC (PANDA straw tube read-out ASIC) was tested as an ASD-8 replacement in different scenarios including a beam test. PASTTREC falls 20% short of the ASD-8 time precision but performs better w.r.t. signal charge measurements and overall operation stability. The measured time precision as a function of distance to the sense wire was modeled within a 3D GARFIELD simulation of the HADES drift cell.

physics.ins-det