arXiv subjects

Peter Orel

Publications and source records attributed to Peter Orel.

24 records · Page 2Linked to original sources

arXiv2023

Demonstrating repetitive non-destructive readout (RNDR) with SiSeRO devices

We demonstrate so-called repetitive non-destructive readout (RNDR) for the first time on a Single electron Sensitive Readout (SiSeRO) device. SiSeRO is a novel on-chip charge detector output stage for charge-coupled device (CCD) image sensors, developed at MIT Lincoln Laboratory. This technology uses a p-MOSFET transistor with a depleted internal gate beneath the transistor channel. The transistor source-drain current is modulated by the transfer of charge into the internal gate. RNDR was realized by transferring the signal charge non-destructively between the internal gate and the summing well (SW), which is the last serial register. The advantage of the non-destructive charge transfer is that the signal charge for each pixel can be measured at the end of each transfer cycle and by averaging for a large number of measurements ($\mathrm{N_{cycle}}$), the total noise can be reduced by a factor of 1/$\mathrm{\sqrt{N_{cycle}}}$. In our experiments with a prototype SiSeRO device, we implemented nine ($\mathrm{N_{cycle}}$ = 9) RNDR cycles, achieving around 2 electron readout noise (equivalent noise charge or ENC) with spectral resolution close to the fano limit for silicon at 5.9 keV. These first results are extremely encouraging, demonstrating successful implementation of the RNDR technique in SiSeROs. They also lay foundation for future experiments with more optimized test stands (better temperature control, larger number of RNDR cycles, RNDR-optimized SiSeRO devices) which should be capable of achieving sub-electron noise sensitivities. This new device class presents an exciting technology for next generation astronomical X-ray telescopes requiring very low-noise spectroscopic imagers. The sub-electron sensitivity also adds the capability to conduct in-situ absolute calibration, enabling unprecedented characterization of the low energy instrument response.

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arXiv2023

The high-speed X-ray camera on AXIS

AXIS is a Probe-class mission concept that will provide high-throughput, high-spatial-resolution X-ray spectral imaging, enabling transformative studies of high-energy astrophysical phenomena. To take advantage of the advanced optics and avoid photon pile-up, the AXIS focal plane requires detectors with readout rates at least 20 times faster than previous soft X-ray imaging spectrometers flying aboard missions such as Chandra and Suzaku, while retaining the low noise, excellent spectral performance, and low power requirements of those instruments. We present the design of the AXIS high-speed X-ray camera, which baselines large-format MIT Lincoln Laboratory CCDs employing low-noise pJFET output amplifiers and a single-layer polysilicon gate structure that allows fast, low-power clocking. These detectors are combined with an integrated high-speed, low-noise ASIC readout chip from Stanford University that provides better performance than conventional discrete solutions at a fraction of their power consumption and footprint. Our complementary front-end electronics concept employs state of the art digital video waveform capture and advanced signal processing to deliver low noise at high speed. We review the current performance of this technology, highlighting recent improvements on prototype devices that achieve excellent noise characteristics at the required readout rate. We present measurements of the CCD spectral response across the AXIS energy band, augmenting lab measurements with detector simulations that help us understand sources of charge loss and evaluate the quality of the CCD backside passivation technique. We show that our technology is on a path that will meet our requirements and enable AXIS to achieve world-class science.

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arXiv2023

Improved noise performance from the next-generation buried-channel p-Mosfet SiSeROs

The Single electron Sensitive Read Out (SiSeRO) is a novel on-chip charge detector output stage for charge-coupled device (CCD) image sensors. Developed at MIT Lincoln Laboratory, this technology uses a p-MOSFET transistor with a depleted internal gate beneath the transistor channel. The transistor source-drain current is modulated by the transfer of charge into the internal gate. At Stanford, we have developed a readout module based on the drain current of the on-chip transistor to characterize the device. In our earlier work, we characterized a number of first prototype SiSeROs with the MOSFET transistor channels at the surface layer. An equivalent noise charge (ENC) of around 15 electrons root mean square (RMS) was obtained. In this work, we examine the first buried-channel SiSeRO. We have achieved substantially improved noise performance of around 4.5 electrons root mean square (RMS) and a full width half maximum (FWHM) energy resolution of 132 eV at 5.9 keV, for a readout speed of 625 kpixel/s. We also discuss how digital filtering techniques can be used to further improve the SiSeRO noise performance. Additional measurements and device simulations will be essential to further mature the SiSeRO technology. This new device class presents an exciting new technology for the next-generation astronomical X-ray telescopes requiring fast, low-noise, radiation-hard megapixel imagers with moderate spectroscopic resolution.

astro-ph.IM↗

arXiv2022

Single electron Sensitive Readout (SiSeRO) X-ray detectors: Technological progress and characterization

Single electron Sensitive Read Out (SiSeRO) is a novel on-chip charge detector output stage for charge-coupled device (CCD) image sensors. Developed at MIT Lincoln Laboratory, this technology uses a p-MOSFET transistor with a depleted internal gate beneath the transistor channel. The transistor source-drain current is modulated by the transfer of charge into the internal gate. At Stanford, we have developed a readout module based on the drain current of the on-chip transistor to characterize the device. Characterization was performed for a number of prototype sensors with different device architectures, e.g. location of the internal gate, MOSFET polysilicon gate structure, and location of the trough in the internal gate with respect to the source and drain of the MOSFET (the trough is introduced to confine the charge in the internal gate). Using a buried-channel SiSeRO, we have achieved a charge/current conversion gain of >700 pA per electron, an equivalent noise charge (ENC) of around 6 electrons root mean square (RMS), and a full width half maximum (FWHM) of approximately 140 eV at 5.9 keV at a readout speed of 625 Kpixel/s. In this paper, we discuss the SiSeRO working principle, the readout module developed at Stanford, and the characterization test results of the SiSeRO prototypes. We also discuss the potential to implement Repetitive Non-Destructive Readout (RNDR) with these devices and the preliminary results which can in principle yield sub-electron ENC performance. Additional measurements and detailed device simulations will be essential to mature the SiSeRO technology. However, this new device class presents an exciting technology for next generation astronomical X-ray telescopes requiring fast, low-noise, radiation hard megapixel imagers with moderate spectroscopic resolution.

astro-ph.IM↗

arXiv2022

Development and characterization of a fast and low noise readout for the next generation X-ray CCDs

The broad energy response, low electronic read noise, and good energy resolution have made X-ray Charge-Coupled Devices (CCDs) an obvious choice for developing soft X-ray astronomical instruments over the last half century. They also come in large array formats with small pixel sizes which make them a potential candidate for the next generation astronomical X-ray missions. However, the next generation X-ray telescopic experiments propose for significantly larger collecting area compared to the existing observatories in order to explore the low luminosity and high redshift X-ray universe which requires these detectors to have an order of magnitude faster readout. In this context, the Stanford University (SU) in collaboration with the Massachusetts Institute of Technology (MIT) has initiated the development of fast readout electronics for X-ray CCDs. At SU, we have designed and developed a fast and low noise readout module with the goal of achieving a readout speed of 5 Mpixel/s. We successfully ran a prototype CCD matrix of 512 $\times$ 512 pixels at 4 Mpixels/s. In this paper, we describe the details of the readout electronics and report the performance of the detectors at these readout speeds in terms of read noise and energy resolution. In the future, we plan to continue to improve performance of the readout module and eventually converge to a dedicated ASIC based readout system to enable parallel read out of large array multi-node CCD devices.

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arXiv2021

First results on SiSeRO (Single electron Sensitive Read Out) devices -- a new X-ray detector for scientific instrumentation

We present an evaluation of a novel on-chip charge detector, called the Single electron Sensitive Read Out (SiSeRO), for charge-coupled device (CCD) image sensor applications. It uses a p-MOSFET transistor at the output stage with a depleted internal gate beneath the p-MOSFET. Charge transferred to the internal gate modulates the source-drain current of the transistor. We have developed a drain current readout module to characterize the detector. The prototype sensor achieves a charge/current conversion gain of 700 pA per electron, an equivalent noise charge (ENC) of 15 electrons (e-) root mean square (RMS), and a full width half maximum (FWHM) of 230 eV at 5.9 keV. In this paper, we discuss the SiSeRO working principle, the readout module developed at Stanford, and the first characterization test results of the SiSeRO prototypes. While at present only a proof-of-concept experiment, in the near future we plan to use next generation sensors with improved noise performance and an enhanced readout module. In particular, we are developing a readout module enabling Repetitive Non-Destructive Readout (RNDR) of the charge, which can in principle yield sub-electron ENC performance. With these developments, we eventually plan to build a matrix of SiSeRO amplifiers to develop an active pixel sensor with an on-chip ASIC-based readout system. Such a system, with fast readout speeds and sub-electron noise, could be effectively utilized in scientific applications requiring fast and low-noise spectro-imagers.

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