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Samuel Stein

Publications and source records attributed to Samuel Stein.

35 records · Page 2Linked to original sources

SPARO: Surface-code Pauli-based Architectural Resource Optimization for Fault-tolerant Quantum Computing

Surface codes represent a leading approach for quantum error correction (QEC), offering a path towards universal fault-tolerant quantum computing (FTQC). However, efficiently implementing algorithms, particularly using Pauli-based computation (PBC) with lattice surgery, necessitates careful resource optimization. Prior work often employs static layouts and simplified error models. These typically fail to capture the full costs and dynamic nature of active computation, leading to resource bottlenecks and suboptimal architectural designs. To address this, we introduce SPARO. SPARO features a comprehensive logical error model based on a large corpus of numerical simulations encompassing active Pauli-based computation (PBC) operations-including Pauli product measurements (PPMs), idling qubits, and patch rotations. Our numerical models are integrated within an end-to-end compilation pipeline. SPARO analyzes algorithm-specific bottlenecks arising from constraints such as limited routing areas or magic-state factory throughput. SPARO then dynamically allocates available hardware resources, balancing compute, routing, and magic-state distillation, to minimize space-time overhead and logical error rates for specific workloads. Our simulations demonstrate that SPARO effectively identifies critical resource trade-offs. When evaluated on benchmark circuits, SPARO identifies resource configurations achieving up to 51.11% logical error rate reductions for 433-qubit ADDER circuits when compared to state-of-the-art static layouts using an identical total resource budget. This dynamic approach enables effective co-optimization of PBC execution and surface-code architectures, significantly improving overall resource efficiency. SPARO will be open sourced.

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Multi-Target Rydberg Gates via Spatial Blockade Engineering

Multi-target gates offer the potential to reduce gate depth in syndrome extraction for quantum error correction. Although neutral-atom quantum computers have demonstrated native multi-qubit gates, existing approaches that avoid additional control or multiple atomic species have been limited to single-target gates. We propose single-control-multi-target CZ^{\otimes N}) gates on a single-species neutral-atom platform that require no extra control and have gate durations comparable to standard CZ gates. Our approach leverages tailored interatomic distances to create an asymmetric blockade between the control and target atoms. Using a GPU-accelerated pulse synthesis protocol, we design smooth control pulses for CZZ and CZZZ gates, achieving fidelities of up to 99.55% and 99.24%, respectively, even in the presence of simulated atom placement errors and Rydberg-state decay. This work presents a practical path to implementing multi-target gates in neutral-atom systems, significantly reducing the resource overhead for syndrome extraction.

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GALIC: Hybrid Multi-Qubitwise Pauli Grouping for Quantum Computing Measurement

Observable estimation is a core primitive in NISQ-era algorithms targeting quantum chemistry applications. To reduce the state preparation overhead required for accurate estimation, recent works have proposed various simultaneous measurement schemes to lower estimator variance. Two primary grouping schemes have been proposed: fully commutativity (FC) and qubit-wise commutativity (QWC), with no compelling means of interpolation. In this work we propose a generalized framework for designing and analyzing context-aware hybrid FC/QWC commutativity relations. We use our framework to propose a noise-and-connectivity aware grouping strategy: Generalized backend-Aware pauLI Commutation (GALIC). We demonstrate how GALIC interpolates between FC and QWC, maintaining estimator accuracy in Hamiltonian estimation while lowering variance by an average of 20\% compared to QWC. We also explore the design space of near-term quantum devices using the GALIC framework, specifically comparing device noise levels and connectivity. We find that error suppression has a more than $10\times$ larger impact on device-aware estimator variance than qubit connectivity with even larger correlation differences in estimator biases.

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Architectures for Heterogeneous Quantum Error Correction Codes

Quantum Error Correction (QEC) is essential for future quantum computers due to its ability to exponentially suppress physical errors. The surface code is a leading error-correcting code candidate because of its local topological structure, experimentally achievable thresholds, and support for universal gate operations with magic states. However, its physical overhead scales quadratically with number of correctable errors. Conversely, quantum low-density parity-check (qLDPC) codes offer superior scaling but lack, on their own, a clear path to universal logical computation. Therefore, it is becoming increasingly evident is becoming that there are significant advantages to designing architectures using multiple codes. Heterogeneous architectures provide a clear path to universal logical computation as well as the ability to access different resource trade offs. To address this, we propose integrating the surface code and gross code using an ancilla bus for inter-code data movement. This approach involves managing trade-offs, including qubit overhead, a constrained instruction set, and gross code (memory) routing and management. While our focus is on the gross-surface code architecture, our method is adaptable to any code combination and the constraints generated by that specific architecture. Motivated by the potential reduction of physical qubit overhead, an ever important feature in the realization of fault tolerant computation, we perform the first full system study of heterogeneous error-correcting codes, discovering architectural trade-offs and optimizing around them. We demonstrate physical qubit reductions of up to 6.42x when executing an algorithm to a specific logical error rate, at the cost of up to a 3.43x increase in execution time.

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TANQ-Sim: Tensorcore Accelerated Noisy Quantum System Simulation via QIR on Perlmutter HPC

Although there have been remarkable advances in quantum computing (QC), it remains crucial to simulate quantum programs using classical large-scale parallel computing systems to validate quantum algorithms, comprehend the impact of noise, and develop resilient quantum applications. This is particularly important for bridging the gap between near-term noisy-intermediate-scale-quantum (NISQ) computing and future fault-tolerant quantum computing (FTQC). Nevertheless, current simulation methods either lack the capability to simulate noise, or simulate with excessive computational costs, or do not scale out effectively. In this paper, we propose TANQ-Sim, a full-scale density matrix based simulator designed to simulate practical deep circuits with both coherent and non-coherent noise. To address the significant computational cost associated with such simulations, we propose a new density-matrix simulation approach that enables TANQ-Sim to leverage the latest double-precision tensorcores (DPTCs) in NVIDIA Ampere and Hopper GPUs. To the best of our knowledge, this is the first application of double-precision tensorcores for non-AI/ML workloads. To optimize performance, we also propose specific gate fusion techniques for density matrix simulation. For scaling, we rely on the advanced GPU-side communication library NVSHMEM and propose effective optimization methods for enhancing communication efficiency. Evaluations on the NERSC Perlmutter supercomputer demonstrate the functionality, performance, and scalability of the simulator. We also present three case studies to showcase the practical usage of TANQ-Sim, including teleportation, entanglement distillation, and Ising simulation. TANQ-Sim will be released on GitHub.

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Design of an entanglement purification protocol selection module

Entanglement purification protocols, designed to improve the fidelity of Bell states over quantum networks for inter-node communications, have attracted significant attention over the last few decades. These protocols have great potential to resolve a core challenge in quantum networking of generating high-fidelity Bell states. However, previous studies focused on the theoretical discussion with limited consideration of realistic errors. Studies of dynamically selecting the right purification protocol under various realistic errors that populate in practice have yet to be performed. In this work, we study the performance of various purification protocols under realistic errors by conducting density matrix simulations over a large suite of error models. Based on our findings of how specific error channels affect the performance of purification protocols, we propose a module that can be embedded in the quantum network. This module determines and selects the appropriate purification protocol, considering not only expected specifications from the network layer but also the capabilities of the physical layer. Finally, the performance of our proposed module is verified using two benchmark categories. Compared with the default approach and exhaustive search approach, we show a success rate approaching 90% in identifying the optimal purification protocol for our target applications.

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A Quantum-Classical Collaborative Training Architecture Based on Quantum State Fidelity

Recent advancements have highlighted the limitations of current quantum systems, particularly the restricted number of qubits available on near-term quantum devices. This constraint greatly inhibits the range of applications that can leverage quantum computers. Moreover, as the available qubits increase, the computational complexity grows exponentially, posing additional challenges. Consequently, there is an urgent need to use qubits efficiently and mitigate both present limitations and future complexities. To address this, existing quantum applications attempt to integrate classical and quantum systems in a hybrid framework. In this study, we concentrate on quantum deep learning and introduce a collaborative classical-quantum architecture called co-TenQu. The classical component employs a tensor network for compression and feature extraction, enabling higher-dimensional data to be encoded onto logical quantum circuits with limited qubits. On the quantum side, we propose a quantum-state-fidelity-based evaluation function to iteratively train the network through a feedback loop between the two sides. co-TenQu has been implemented and evaluated with both simulators and the IBM-Q platform. Compared to state-of-the-art approaches, co-TenQu enhances a classical deep neural network by up to 41.72% in a fair setting. Additionally, it outperforms other quantum-based methods by up to 1.9 times and achieves similar accuracy while utilizing 70.59% fewer qubits.

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Distributed Quantum Learning with co-Management in a Multi-tenant Quantum System

The rapid advancement of quantum computing has pushed classical designs into the quantum domain, breaking physical boundaries for computing-intensive and data-hungry applications. Given its immense potential, quantum-based computing systems have attracted increasing attention with the hope that some systems may provide a quantum speedup. For example, variational quantum algorithms have been proposed for quantum neural networks to train deep learning models on qubits, achieving promising results. Existing quantum learning architectures and systems rely on single, monolithic quantum machines with abundant and stable resources, such as qubits. However, fabricating a large, monolithic quantum device is considerably more challenging than producing an array of smaller devices. In this paper, we investigate a distributed quantum system that combines multiple quantum machines into a unified system. We propose DQuLearn, which divides a quantum learning task into multiple subtasks. Each subtask can be executed distributively on individual quantum machines, with the results looping back to classical machines for subsequent training iterations. Additionally, our system supports multiple concurrent clients and dynamically manages their circuits according to the runtime status of quantum workers. Through extensive experiments, we demonstrate that DQuLearn achieves similar accuracies with significant runtime reduction, by up to 68.7% and an increase per-second circuit processing speed, by up to 3.99 times, in a 4-worker multi-tenant setting.

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A Synergistic Compilation Workflow for Tackling Crosstalk in Quantum Machines

Near-term quantum systems tend to be noisy. Crosstalk noise has been recognized as one of several major types of noises in superconducting Noisy Intermediate-Scale Quantum (NISQ) devices. Crosstalk arises from the concurrent execution of two-qubit gates on nearby qubits, such as \texttt{CX}. It might significantly raise the error rate of gates in comparison to running them individually. Crosstalk can be mitigated through scheduling or hardware machine tuning. Prior scientific studies, however, manage crosstalk at a really late phase in the compilation process, usually after hardware mapping is done. It may miss great opportunities of optimizing algorithm logic, routing, and crosstalk at the same time. In this paper, we push the envelope by considering all these factors simultaneously at the very early compilation stage. We propose a crosstalk-aware quantum program compilation framework called CQC that can enhance crosstalk mitigation while achieving satisfactory circuit depth. Moreover, we identify opportunities for translation from intermediate representation to the circuit for application-specific crosstalk mitigation, for instance, the \texttt{CX} ladder construction in variational quantum eigensolvers (VQE). Evaluations through simulation and on real IBM-Q devices show that our framework can significantly reduce the error rate by up to 6$\times$, with only $\sim$60\% circuit depth compared to state-of-the-art gate scheduling approaches. In particular, for VQE, we demonstrate 49\% circuit depth reduction with 9.6\% fidelity improvement over prior art on the H4 molecule using IBMQ Guadalupe. Our CQC framework will be released on GitHub.

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Co-Designed Superconducting Architecture for Lattice Surgery of Surface Codes with Quantum Interface Routing Card

Facilitating the ability to achieve logical qubit error rates below physical qubit error rates, error correction is anticipated to play an important role in scaling quantum computers. While many algorithms require millions of physical qubits to be executed with error correction, current superconducting qubit systems contain only hundreds of physical qubits. One of the most promising codes on the superconducting qubit platform is the surface code, requiring a realistically attainable error threshold and the ability to perform universal fault-tolerant quantum computing with local operations via lattice surgery and magic state injection. Surface code architectures easily generalize to single-chip planar layouts, however space and control hardware constraints point to limits on the number of qubits that can fit on one chip. Additionally, the planar routing on single-chip architectures leads to serialization of commuting gates and strain on classical decoding caused by large ancilla patches. A distributed multi-chip architecture utilizing the surface code can potentially solve these problems if one can optimize inter-chip gates, manage collisions in networking between chips, and minimize routing hardware costs. We propose QuIRC, a superconducting Quantum Interface Routing Card for Lattice Surgery between surface code modules inside of a single dilution refrigerator. QuIRC improves scaling by allowing connection of many modules, increases ancilla connectivity of surface code lattices, and offers improved transpilation of Pauli-based surface code circuits. QuIRC employs in-situ Entangled Pair (EP) generation protocols for communication. We explore potential topological layouts of QuIRC based on superconducting hardware fabrication constraints, and demonstrate reductions in ancilla patch size by up to 77.8%, and in layer transpilation size by 51.9% when compared to the single-chip case.

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Multi-mode Cavity Centric Architectures for Quantum Simulation

Near-term quantum computing technologies grapple with huge complexity overheads, hindering their ability to induce algorithms, necessitating engineering and scientific innovations. One class of problems of interest is Quantum Simulation, whereby quantum systems are simulated using a quantum computer. However, current devices are yet to surpass classical tensor network techniques. For problems of interest, where classical simulation techniques fail, large degrees of entanglement are required. Another challenge of implementing quantum simulation problems is that qubits sit idle whilst alternating simulation terms are implemented, exposing the system to decoherence. In the near term, 2D planar superconducting lattices of circuit-QED elements such as the transmon continue to draw substantial attention, but they are hindered by their nearest neighbor topology and relatively short lifespan, two problems that are problematic for quantum simulation. One technology of particular interest is the multi-mode superconducting resonator capable of storing multiple qubits in one device. We observe that these cavities have a natural virtual topology that aligns particularly well with quantum simulation problems, and exhibit much longer lifespans in comparison to other planar superconducting hardware. In this paper we present MUCIC, we discuss the simple integration of these devices into the current landscape and their implications to quantum simulation, motivated by their alignment to the quantum simulation problem, and potential as a quantum memory candidate. We report the development of MUCICs transpiler, leading to reductions of up to 82% in quantum simulation circuit depths. Additionally, our investigation demonstrates improvements of up to 19.4% in converged results from Variational Quantum Algorithms.

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QASMTrans: A QASM based Quantum Transpiler Framework for NISQ Devices

The success of a quantum algorithm hinges on the ability to orchestrate a successful application induction. Detrimental overheads in mapping general quantum circuits to physically implementable routines can be the deciding factor between a successful and erroneous circuit induction. In QASMTrans, we focus on the problem of rapid circuit transpilation. Transpilation plays a crucial role in converting high-level, machine-agnostic circuits into machine-specific circuits constrained by physical topology and supported gate sets. The efficiency of transpilation continues to be a substantial bottleneck, especially when dealing with larger circuits requiring high degrees of inter-qubit interaction. QASMTrans is a high-performance C++ quantum transpiler framework that demonstrates up to 369X speedups compared to the commonly used Qiskit transpiler. We observe speedups on large dense circuits such as uccsd_n24 and qft_n320 which require O(10^6) gates. QASMTrans successfully transpiles the aforementioned circuits in 69s and 31s, whilst Qiskit exceeded an hour of transpilation time. With QASMTrans providing transpiled circuits in a fraction of the time of prior transpilers, potential design space exploration, and heuristic-based transpiler design becomes substantially more tractable. QASMTrans is released at http://github.com/pnnl/qasmtrans.

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Microarchitectures for Heterogeneous Superconducting Quantum Computers

Noisy Intermediate-Scale Quantum Computing (NISQ) has dominated headlines in recent years, with the longer-term vision of Fault-Tolerant Quantum Computation (FTQC) offering significant potential albeit at currently intractable resource costs and quantum error correction (QEC) overheads. For problems of interest, FTQC will require millions of physical qubits with long coherence times, high-fidelity gates, and compact sizes to surpass classical systems. Just as heterogeneous specialization has offered scaling benefits in classical computing, it is likewise gaining interest in FTQC. However, systematic use of heterogeneity in either hardware or software elements of FTQC systems remains a serious challenge due to the vast design space and variable physical constraints. This paper meets the challenge of making heterogeneous FTQC design practical by introducing HetArch, a toolbox for designing heterogeneous quantum systems, and using it to explore heterogeneous design scenarios. Using a hierarchical approach, we successively break quantum algorithms into smaller operations (akin to classical application kernels), thus greatly simplifying the design space and resulting tradeoffs. Specializing to superconducting systems, we then design optimized heterogeneous hardware composed of varied superconducting devices, abstracting physical constraints into design rules that enable devices to be assembled into standard cells optimized for specific operations. Finally, we provide a heterogeneous design space exploration framework which reduces the simulation burden by a factor of 10^4 or more and allows us to characterize optimal design points. We use these techniques to design superconducting quantum modules for entanglement distillation, error correction, and code teleportation, reducing error rates by 2.6x, 10.7x, and 3.0x compared to homogeneous systems.

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Quantum Bayesian Error Mitigation Employing Poisson Modelling over the Hamming Spectrum for Quantum Error Mitigation

The field of quantum computing has experienced a rapid expansion in recent years, with ongoing exploration of new technologies, a decrease in error rates, and a growth in the number of qubits available in quantum processors. However, near-term quantum algorithms are still unable to be induced without compounding consequential levels of noise, leading to non-trivial erroneous results. Quantum Error Correction and Mitigation are rapidly advancing areas of research in the quantum computing landscape, with a goal of reducing errors. IBM has recently emphasized that Quantum Error Mitigation is the key to unlocking the full potential of quantum computing. A recent work, namely HAMMER, demonstrated the existence of a latent structure regarding post-circuit induction errors when mapping to the Hamming spectrum. However, they assumed that errors occur solely in local clusters, whereas we observe that at higher average Hamming distances this structure falls away. Our study demonstrates that the correlated structure is not just limited to local patterns, but it also encompasses certain non-local clustering patterns that can be accurately characterized through a Poisson distribution model. This model takes into account the input circuit, the current state of the device, including calibration statistics, and the qubit topology. Using this quantum error characterizing model, we developed an iterative algorithm over the generated Bayesian network state-graph for post-induction error mitigation. Our Q-Beep approach delivers state-of-the-art results, thanks to its problem-aware modeling of the error distribution's underlying structure and the implementation of an Bayesian network state-graph. This has resulted in an increase of up to 234.6% in circuit execution accuracy on BV circuits and an average improvement of 71.0% in the quality of QAOA solutions when tested on 16 IBMQ quantum processors.

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GAAF: Searching Activation Functions for Binary Neural Networks through Genetic Algorithm

Binary neural networks (BNNs) show promising utilization in cost and power-restricted domains such as edge devices and mobile systems. This is due to its significantly less computation and storage demand, but at the cost of degraded performance. To close the accuracy gap, in this paper we propose to add a complementary activation function (AF) ahead of the sign based binarization, and rely on the genetic algorithm (GA) to automatically search for the ideal AFs. These AFs can help extract extra information from the input data in the forward pass, while allowing improved gradient approximation in the backward pass. Fifteen novel AFs are identified through our GA-based search, while most of them show improved performance (up to 2.54% on ImageNet) when testing on different datasets and network models. Our method offers a novel approach for designing general and application-specific BNN architecture. Our code is available at http://github.com/flying-Yan/GAAF.

cs.NE↗

QASMBench: A Low-level QASM Benchmark Suite for NISQ Evaluation and Simulation

The rapid development of quantum computing (QC) in the NISQ era urgently demands a low-level benchmark suite and insightful evaluation metrics for characterizing the properties of prototype NISQ devices, the efficiency of QC programming compilers, schedulers and assemblers, and the capability of quantum system simulators in a classical computer. In this work, we fill this gap by proposing a low-level, easy-to-use benchmark suite called QASMBench based on the OpenQASM assembly representation. It consolidates commonly used quantum routines and kernels from a variety of domains including chemistry, simulation, linear algebra, searching, optimization, arithmetic, machine learning, fault tolerance, cryptography, etc., trading-off between generality and usability. To analyze these kernels in terms of NISQ device execution, in addition to circuit width and depth, we propose four circuit metrics including gate density, retention lifespan, measurement density, and entanglement variance, to extract more insights about the execution efficiency, the susceptibility to NISQ error, and the potential gain from machine-specific optimizations. Applications in QASMBench can be launched and verified on several NISQ platforms, including IBM-Q, Rigetti, IonQ and Quantinuum. For evaluation, we measure the execution fidelity of a subset of QASMBench applications on 12 IBM-Q machines through density matrix state tomography, which comprises 25K circuit evaluations. We also compare the fidelity of executions among the IBM-Q machines, the IonQ QPU and the Rigetti Aspen M-1 system. QASMBench is released at: http://github.com/pnnl/QASMBench.

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EQC : Ensembled Quantum Computing for Variational Quantum Algorithms

Variational quantum algorithm (VQA), which is comprised of a classical optimizer and a parameterized quantum circuit, emerges as one of the most promising approaches for harvesting the power of quantum computers in the noisy intermediate scale quantum (NISQ) era. However, the deployment of VQAs on contemporary NISQ devices often faces considerable system and time-dependant noise and prohibitively slow training speeds. On the other hand, the expensive supporting resources and infrastructure make quantum computers extremely keen on high utilization. In this paper, we propose a virtualized way of building up a quantum backend for variational quantum algorithms: rather than relying on a single physical device which tends to introduce temporal-dependant device-specific noise with worsening performance as time-since-calibration grows, we propose to constitute a quantum ensemble, which dynamically distributes quantum tasks asynchronously across a set of physical devices, and adjusting the ensemble configuration with respect to machine status. In addition to reduced machine-dependant noise, the ensemble can provide significant speedups for VQA training. With this idea, we build a novel VQA training framework called EQC that comprises: (i) a system architecture for asynchronous parallel VQA cooperative training; (ii) an analytic model for assessing the quality of the returned VQA gradient over a particular device concerning its architecture, transpilation, and runtime conditions; (iii) a weighting mechanism to adjust the quantum ensemble's computational contribution according to the systems' current performance. Evaluations comprising 500K circuit evaluations across 10 IBMQ devices using a VQE and a QAOA applications demonstrate that EQC can attain error rates close to the most performant device of the ensemble, while boosting the training speed by 10.5x on average (up to 86x and at least 5.2x).

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