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Supriyo Datta

Publications and source records attributed to Supriyo Datta.

At least 37 records · Page 2Linked to original sources

The Non-Equilibrium Green Function (NEGF) Method

The Non-Equilibrium Green Function (NEGF) method was established in the 1960's through the classic work of Schwinger, Kadanoff, Baym, Keldysh and others using many-body perturbation theory (MBPT) and the diagrammatic theory for non-equilibrium processes. Much of the literature is based on the original MBPT-based approach and this makes it inaccessible to those unfamiliar with advanced quantum statistical mechanics. We obtain the NEGF equations directly from a one-electron Schrödinger equation using relatively elementary arguments. These equations have been used to discuss many problems of great interest such as quantized conductance, (integer) quantum Hall effect, Anderson localization, resonant tunneling and spin transport without a systematic treatment of many-body effects. But it goes beyond purely coherent transport allowing us to include phase-breaking interactions (both momentum-relaxing and momentum-conserving as well as spin-conserving and spin-relaxing) within a self-consistent Born approximation. We believe that the scope and utility of the NEGF equations transcend the MBPT-based approach originally used to derive it. NEGF teaches us how to combine quantum dynamics with "contacts" much as Boltzmann taught us how to combine classical dynamics with "contacts", using the word contacts in a broad, figurative sense to denote all kinds of entropy-driven processes. We believe that this approach to "contact-ing" the Schrödinger equation should be of broad interest to anyone working on device physics or non-equilibrium statistical mechanics in general.

cond-mat.mes-hall↗

Autonomous Probabilistic Coprocessing with Petaflips per Second

In this paper we present a concrete design for a probabilistic (p-) computer based on a network of p-bits, robust classical entities fluctuating between -1 and +1, with probabilities that are controlled through an input constructed from the outputs of other p-bits. The architecture of this probabilistic computer is similar to a stochastic neural network with the p-bit playing the role of a binary stochastic neuron, but with one key difference: there is no sequencer used to enforce an ordering of p-bit updates, as is typically required. Instead, we explore \textit{sequencerless} designs where all p-bits are allowed to flip autonomously and demonstrate that such designs can allow ultrafast operation unconstrained by available clock speeds without compromising the solution's fidelity. Based on experimental results from a hardware benchmark of the autonomous design and benchmarked device models, we project that a nanomagnetic implementation can scale to achieve petaflips per second with millions of neurons. A key contribution of this paper is the focus on a hardware metric $-$ flips per second $-$ as a problem and substrate-independent figure-of-merit for an emerging class of hardware annealers known as Ising Machines. Much like the shrinking feature sizes of transistors that have continually driven Moore's Law, we believe that flips per second can be continually improved in later technology generations of a wide class of probabilistic, domain specific hardware.

cs.ET↗

Hardware Design for Autonomous Bayesian Networks

Directed acyclic graphs or Bayesian networks that are popular in many AI related sectors for probabilistic inference and causal reasoning can be mapped to probabilistic circuits built out of probabilistic bits (p-bits), analogous to binary stochastic neurons of stochastic artificial neural networks. In order to satisfy standard statistical results, individual p-bits not only need to be updated sequentially, but also in order from the parent to the child nodes, necessitating the use of sequencers in software implementations. In this article, we first use SPICE simulations to show that an autonomous hardware Bayesian network can operate correctly without any clocks or sequencers, but only if the individual p-bits are appropriately designed. We then present a simple behavioral model of the autonomous hardware illustrating the essential characteristics needed for correct sequencer-free operation. This model is also benchmarked against SPICE simulations and can be used to simulate large scale networks. Our results could be useful in the design of hardware accelerators that use energy efficient building blocks suited for low-level implementations of Bayesian networks. The autonomous massively parallel operation of our proposed stochastic hardware has biological relevance since neural dynamics in brain is also stochastic and autonomous by nature.

cs.ET↗

Hardware implementation of Bayesian network building blocks with stochastic spintronic devices

Bayesian networks are powerful statistical models to understand causal relationships in real-world probabilistic problems such as diagnosis, forecasting, computer vision, etc. For systems that involve complex causal dependencies among many variables, the complexity of the associated Bayesian networks become computationally intractable. As a result, direct hardware implementation of these networks is one promising approach to reducing power consumption and execution time. However, the few hardware implementations of Bayesian networks presented in literature rely on deterministic CMOS devices that are not efficient in representing the inherently stochastic variables in a Bayesian network. This work presents an experimental demonstration of a Bayesian network building block implemented with naturally stochastic spintronic devices. These devices are based on nanomagnets with perpendicular magnetic anisotropy, initialized to their hard axes by the spin orbit torque from a heavy metal under-layer utilizing the giant spin Hall effect, enabling stochastic behavior. We construct an electrically interconnected network of two stochastic devices and manipulate the correlations between their states by changing connection weights and biases. By mapping given conditional probability tables to the circuit hardware, we demonstrate that any two node Bayesian networks can be implemented by our stochastic network. We then present the stochastic simulation of an example case of a four node Bayesian network using our proposed device, with parameters taken from the experiment. We view this work as a first step towards the large scale hardware implementation of Bayesian networks.

cond-mat.mes-hall↗

Probabilistic Circuits for Autonomous Learning: A simulation study

Modern machine learning is based on powerful algorithms running on digital computing platforms and there is great interest in accelerating the learning process and making it more energy efficient. In this paper we present a fully autonomous probabilistic circuit for fast and efficient learning that makes no use of digital computing. Specifically we use SPICE simulations to demonstrate a clockless autonomous circuit where the required synaptic weights are read out in the form of analog voltages. Such autonomous circuits could be particularly of interest as standalone learning devices in the context of mobile and edge computing.

cs.ET↗

Subnanosecond Fluctuations in Low-Barrier Nanomagnets

Fast magnetic fluctuations due to thermal torques have useful technological functionality ranging from cryptography to probabilistic computing. The characteristic time of fluctuations in typical uniaxial anisotropy magnets studied so far is bounded from below by the well-known energy relaxation mechanism. This time scales as $α^{-1}$, where $α$ parameterizes the strength of dissipative processes. Here, we theoretically analyze the fluctuating dynamics in easy-plane and antiferromagnetically coupled nanomagnets. We find in such magnets, the dynamics are strongly influenced by fluctuating intrinsic fields, which give rise to an additional dephasing-type mechanism for washing out correlations. In particular, we establish two time scales for characterizing fluctuations (i) the average time for a nanomagnet to reverse|which for the experimentally relevant regime of low damping is governed primarily by dephasing and becomes independent of $α$, (ii) the time scale for memory loss of a single nanomagnet|which scales as $α^{-1/3}$ and is governed by a combination of energy dissipation and dephasing mechanism. For typical experimentally accessible values of intrinsic fields, the resultant thermal-fluctuation rate is increased by multiple orders of magnitude when compared with the bound set solely by the energy relaxation mechanism in uniaxial magnets. This could lead to higher operating speeds of emerging devices exploiting magnetic fluctuations.

cond-mat.mes-hall↗

Scalable Emulation of Sign-Problem$-$Free Hamiltonians with Room Temperature p-bits

The growing field of quantum computing is based on the concept of a q-bit which is a delicate superposition of 0 and 1, requiring cryogenic temperatures for its physical realization along with challenging coherent coupling techniques for entangling them. By contrast, a probabilistic bit or a p-bit is a robust classical entity that fluctuates between 0 and 1, and can be implemented at room temperature using present-day technology. Here, we show that a probabilistic coprocessor built out of room temperature p-bits can be used to accelerate simulations of a special class of quantum many-body systems that are sign-problem$-$free or stoquastic, leveraging the well-known Suzuki-Trotter decomposition that maps a $d$-dimensional quantum many body Hamiltonian to a $d$+1-dimensional classical Hamiltonian. This mapping allows an efficient emulation of a quantum system by classical computers and is commonly used in software to perform Quantum Monte Carlo (QMC) algorithms. By contrast, we show that a compact, embedded MTJ-based coprocessor can serve as a highly efficient hardware-accelerator for such QMC algorithms providing several orders of magnitude improvement in speed compared to optimized CPU implementations. Using realistic device-level SPICE simulations we demonstrate that the correct quantum correlations can be obtained using a classical p-circuit built with existing technology and operating at room temperature. The proposed coprocessor can serve as a tool to study stoquastic quantum many-body systems, overcoming challenges associated with physical quantum annealers.

quant-ph↗

Correlated fluctuations in spin orbit torque-coupled perpendicular nanomagnets

Low barrier nanomagnets have attracted a lot of research interest for their use as sources of high quality true random number generation. More recently, low barrier nanomagnets with tunable output have been shown to be a natural hardware platform for unconventional computing paradigms such as probabilistic spin logic. Efficient generation and tunability of high quality random bits is critical for these novel applications. However, current spintronic random number generators are based on superparamagnetic tunnel junctions (SMTJs) with tunability obtained through spin transfer torque (STT), which unavoidably leads to challenges in designing concatenated networks using these two terminal devices. The more recent development of utilizing spin orbit torque (SOT) allows for a three terminal device design, but can only tune in-plane magnetization freely, which is not very energy efficient due to the needs of overcoming a large demagnetization field. In this work, we experimentally demonstrate for the first time, a stochastic device with perpendicular magnetic anisotropy (PMA) that is completely tunable by SOT without the aid of any external magnetic field. Our measurements lead us to hypothesize that a tilted anisotropy might be responsible for the observed tunability. We carry out stochastic Landau-Lifshitz-Gilbert (sLLG) simulations to confirm our experimental observation. Finally, we build an electrically coupled network of two such stochastic nanomagnet based devices and demonstrate that finite correlation or anti-correlation can be established between their output fluctuations by a weak interconnection, despite having a large difference in their natural fluctuation time scale. Simulations based on a newly developed dynamical model for autonomous circuits composed of low barrier nanomagnets show close agreement with the experimental results.

physics.app-ph↗

Non-Equilibrium Green's Function based Circuit Models for Coherent Spin Devices

With recent developments in spintronics, it is now possible to envision spin-driven devices with magnets and interconnects that require a new class of transport models using generalized Fermi functions and currents, each with four components: one for charge and three for spin. The corresponding impedance elements are not pure numbers but $4\times4$ matrices. Starting from the Non-Equilibrium Green's Function (NEGF) formalism in the elastic, phase-coherent transport regime, we develop spin generalized Landauer-Büttiker formulas involving such $4\times 4$ conductances, for multi-terminal devices in the presence of Normal-Metal (NM) leads. In addition to usual terminal conductances describing currents at the contacts, we provide spin-transfer torque conductances describing the spin currents absorbed by ferromagnetic (FM) regions inside the conductor, specifying both of these currents in terms of Fermi functions at the terminals. We derive universal sum rules and reciprocity relations that would be obeyed by such matrix conductances. Finally, we apply our formulation to two example Hamiltonians describing the Rashba and the Hanle effect in 2D. Our results allows the use of pure quantum transport models as building blocks in constructing circuit models for complex spintronic and nano-magnetic structures and devices for simulation in SPICE-like simulators.

cond-mat.mes-hall↗

Rectification in Spin-Orbit Materials Using Low Energy Barrier Magnets

The coupling of spin-orbit materials to high energy barrier ($\sim$40-60 $k_BT$) nano-magnets has attracted growing interest for exciting new physics and various spintronic applications. We predict that a coupling between the spin-momentum locking (SML) observed in spin-orbit materials and low-energy barrier magnets (LBM) should exhibit a unique multi-terminal rectification for arbitrarily small amplitude channel currents. The basic idea is to measure the charge current induced spin accumulation in the SML channel in the form of a magnetization dependent voltage using an LBM, either with an in-plane or perpendicular anisotropy (IMA or PMA). The LBM feels an instantaneous spin-orbit torque due to the accumulated spins in the channel which causes the average magnetization to follow the current, leading to the non-linear rectification. We discuss the frequency band of this multi-terminal rectification which can be understood in terms of the angular momentum conservation in the LBM. For a fixed spin-current from the SML channel, the frequency band is same for LBMs with IMA and PMA, as long as they have the same total magnetic moment in a given volume. The proposed all-metallic structure could find application as highly sensitive passive rf detectors and as energy harvesters from weak ambient sources where standard technologies may not operate.

cond-mat.mes-hall↗

Low Barrier Magnet Design for Efficient Hardware Binary Stochastic Neurons

Binary stochastic neurons (BSN's) form an integral part of many machine learning algorithms, motivating the development of hardware accelerators for this complex function. It has been recognized that hardware BSN's can be implemented using low barrier magnets (LBM's) by minimally modifying present-day magnetoresistive random access memory (MRAM) devices. A crucial parameter that determines the response of these LBM based BSN designs is the \emph{correlation time} of magnetization, $τ_c$. In this letter, we show that for magnets with low energy barriers ($Δ\approx k_BT$ and below), circular disk magnets with in-plane magnetic anisotropy (IMA) lead to $τ_c$ values that are two orders of magnitude smaller compared to $τ_c$ for magnets having perpendicular magnetic anisotropy (PMA) and provide analytical descriptions. We show that this striking difference in $τ_c$ is due to a precession-like fluctuation mechanism that is enabled by the large demagnetization field in IMA magnets. We provide a detailed energy-delay performance evaluation of previously proposed BSN designs based on Spin-Orbit-Torque (SOT) MRAM and Spin-Transfer-Torque (STT) MRAM employing low barrier circular IMA magnets by SPICE simulations. The designs exhibit sub-ns response times leading to energy requirements of $\sim$a few fJ to evaluate the BSN function, orders of magnitude lower than digital CMOS implementations with a much larger footprint. While modern MRAM technology is based on PMA magnets, results in this paper suggest that low barrier circular IMA magnets may be more suitable for this application.

cs.ET↗

p-Bits for Probabilistic Spin Logic

We introduce the concept of a probabilistic or p-bit, intermediate between the standard bits of digital electronics and the emerging q-bits of quantum computing. We show that low barrier magnets or LBM's provide a natural physical representation for p-bits and can be built either from perpendicular magnets (PMA) designed to be close to the in-plane transition or from circular in-plane magnets (IMA). Magnetic tunnel junctions (MTJ) built using LBM's as free layers can be combined with standard NMOS transistors to provide three-terminal building blocks for large scale probabilistic circuits that can be designed to perform useful functions. Interestingly, this three-terminal unit looks just like the 1T/MTJ device used in embedded MRAM technology, with only one difference: the use of an LBM for the MTJ free layer. We hope that the concept of p-bits and p-circuits will help open up new application spaces for this emerging technology. However, a p-bit need not involve an MTJ, any fluctuating resistor could be combined with a transistor to implement it, while completely digital implementations using conventional CMOS technology are also possible. The p-bit also provides a conceptual bridge between two active but disjoint fields of research, namely stochastic machine learning and quantum computing. First, there are the applications that are based on the similarity of a p-bit to the binary stochastic neuron (BSN), a well-known concept in machine learning. Three-terminal p-bits could provide an efficient hardware accelerator for the BSN. Second, there are the applications that are based on the p-bit being like a poor man's q-bit. Initial demonstrations based on full SPICE simulations show that several optimization problems including quantum annealing are amenable to p-bit implementations which can be scaled up at room temperature using existing technology.

cs.ET↗

Voltage-driven Building Block for Hardware Belief Networks

Probabilistic spin logic (PSL), based on networks of binary stochastic neurons (or p-bits), has been shown to provide a viable framework for many functionalities including Ising computing, Bayesian inference, invertible Boolean logic and image recognition. This paper presents a hardware building block for the PSL architecture, consisting of an embedded MTJ and a capacitive voltage adder of the type used in neuMOS. We use SPICE simulations to show how identical copies of these building blocks (or weighted p-bits) can be interconnected with wires to design and solve a small instance of the NP-complete Subset Sum Problem fully in hardware.

cs.ET↗

Composable Probabilistic Inference Networks Using MRAM-based Stochastic Neurons

Magnetoresistive random access memory (MRAM) technologies with thermally unstable nanomagnets are leveraged to develop an intrinsic stochastic neuron as a building block for restricted Boltzmann machines (RBMs) to form deep belief networks (DBNs). The embedded MRAM-based neuron is modeled using precise physics equations. The simulation results exhibit the desired sigmoidal relation between the input voltages and probability of the output state. A probabilistic inference network simulator (PIN-Sim) is developed to realize a circuit-level model of an RBM utilizing resistive crossbar arrays along with differential amplifiers to implement the positive and negative weight values. The PIN-Sim is composed of five main blocks to train a DBN, evaluate its accuracy, and measure its power consumption. The MNIST dataset is leveraged to investigate the energy and accuracy tradeoffs of seven distinct network topologies in SPICE using the 14nm HP-FinFET technology library with the nominal voltage of 0.8V, in which an MRAM-based neuron is used as the activation function. The software and hardware level simulations indicate that a $784\times200\times10$ topology can achieve less than 5% error rates with $\sim400 pJ$ energy consumption. The error rates can be reduced to 2.5% by using a $784\times500\times500\times500\times10$ DBN at the cost of $\sim10\times$ higher energy consumption and significant area overhead. Finally, the effects of specific hardware-level parameters on power dissipation and accuracy tradeoffs are identified via the developed PIN-Sim framework.

cs.ET↗

Transmission Line Model for Materials with Spin-Momentum Locking

We provide a transmission line representation for channels exhibiting spin-momentum locking (SML) which can be used for both time-dependent and steady-state transport analysis on a wide variety of materials with spin-orbit coupling such as topological insulators, heavy metals, oxide interfaces, and narrow bandgap semiconductors. This model is based on a time-dependent four-component diffusion equation obtained from the Boltzmann transport equation assuming linear response and elastic scattering in the channel. We classify all electronic states in the channel into four groups ($U^+$, $D^+$, $U^-$, and $D^-$) depending on the spin index (up ($U$), down ($D$)) and the sign of the $x$-component of the group velocity ($+,-$) and assign an average electrochemical potential to each of the four groups to obtain the four-component diffusion equation. For normal metal channels, the model decouples into the well-known transmission line model for charge and a time-dependent version of Valet-Fert equation for spin. We first show that in the steady-state limit our model leads to simple expressions for charge-spin interconversion in SML channels in good agreement with existing experimental data on diverse materials. We then use the full time-dependent model to study spin-charge separation in the presence of SML, a subject that has been controversial in the past. Our model shows that the charge and spin signals travel with two distinct velocities resulting in well-known spin-charge separation which is expected to persist even in the presence of SML. However, our model predicts that the lower velocity signal is purely spin while the higher velocity signal is largely charge with an additional spin component which has not been noted before. Finally, we note that our model can be used within standard circuit simulators like SPICE to obtain numerical results for complex geometries.

cond-mat.mes-hall↗

Equivalent Circuit for Magnetoelectric Read and Write Operations

We describe an equivalent circuit model applicable to a wide variety of magnetoelectric phenomena and use SPICE simulations to benchmark this model against experimental data. We use this model to suggest a different mode of operation where the "1" and "0'" states are not represented by states with net magnetization (like $m_x$, $m_y$ or $m_z$) but by different easy axes, quantitatively described by ($m_x^2 - m_y^2$) which switches from "0" to "1" through the write voltage. This change is directly detected as a read signal through the inverse effect. The use of ($m_x^2 - m_y^2$) to represent a bit is a radical departure from the standard convention of using the magnetization ($m$) to represent information. We then show how the equivalent circuit can be used to build a device exhibiting tunable randomness and suggest possibilities for extending it to non-volatile memory with read and write capabilities, without the use of external magnetic fields or magnetic tunnel junctions.

cond-mat.mes-hall↗

Implementing Bayesian Networks with Embedded Stochastic MRAM

Magnetic tunnel junctions (MTJ's) with low barrier magnets have been used to implement random number generators (RNG's) and it has recently been shown that such an MTJ connected to the drain of a conventional transistor provides a three-terminal tunable RNG or a $p$-bit. In this letter we show how this $p$-bit can be used to build a $p$-circuit that emulates a Bayesian network (BN), such that the correlations in real world variables can be obtained from electrical measurements on the corresponding circuit nodes. The $p$-circuit design proceeds in two steps: the BN is first translated into a behavioral model, called Probabilistic Spin Logic (PSL), defined by dimensionless biasing (h) and interconnection (J) coefficients, which are then translated into electronic circuit elements. As a benchmark example, we mimic a family tree of three generations and show that the genetic relatedness calculated from a SPICE-compatible circuit simulator matches well-known results.

cs.ET↗

Hardware emulation of stochastic p-bits for invertible logic

The common feature of nearly all logic and memory devices is that they make use of stable units to represent 0's and 1's. A completely different paradigm is based on three-terminal stochastic units which could be called "p-bits", where the output is a random telegraphic signal continuously fluctuating between 0 and 1 with a tunable mean. p-bits can be interconnected to receive weighted contributions from others in a network, and these weighted contributions can be chosen to not only solve problems of optimization and inference but also to implement precise Boolean functions in an inverted mode. This inverted operation of Boolean gates is particularly striking: They provide inputs consistent to a given output along with unique outputs to a given set of inputs. The existing demonstrations of accurate invertible logic are intriguing, but will these striking properties observed in computer simulations carry over to hardware implementations? This paper uses individual micro controllers to emulate p-bits, and we present results for a 4-bit ripple carry adder with 48 p-bits and a 4-bit multiplier with 46 p-bits working in inverted mode as a factorizer. Our results constitute a first step towards implementing p-bits with nano devices, like stochastic Magnetic Tunnel Junctions.

cs.ET↗