Phase-Topology Classification of Memristor Hysteresis Loops via Self-Crossings
Memristive devices have revolutionized non-volatile memory and neuromorphic computing, yet the geometry of their hysteresis loops -- in particular, the occurrence and robustness of multiple self-crossings -- remains poorly understood. Here we introduce a topological and algebraic framework that treats the number of transverse self-intersections of a memristor hysteresis loop as a robust integer-valued invariant. Drawing on differential topology, singularity theory, and cusp catastrophe, we employ discriminants and resultants to stratify the six-dimensional parameter space. This approach partitions the parameter space into structurally stable regions separated by explicitly computable catastrophe surfaces. We demonstrate that the crossing number remains strictly invariant under continuous deformations and changes only at self-tangencies or cusp singularities, thereby providing a complete classification of all multi-lobed hysteresis behaviors. These insights bridge device physics with modern singularity theory and suggest a clear roadmap for exploiting higher-order memory effects in next-generation electronics and brain-inspired hardware.