arXiv subjects

Tibor Grasser

Publications and source records attributed to Tibor Grasser.

At least 19 recordsLinked to original sources

arXiv2026

Efficient Quantum-Mechanical Modeling of Nonradiative Charge Transfer Processes

Nonradiative charge transfer processes play a central role in a wide range of physical phenomena, including reliability phenomena in semiconductor devices such as bias temperature instability, hysteresis, random telegraph noise, and trap-assisted tunneling. nonradiative multiphonon (NMP) theory provides a physically rigorous framework for describing such charge transitions, but its full quantum-mechanical formulation is computationally too demanding for large-scale simulations. In this work, we present a systematic and implementation-oriented treatment of NMP-based models for practical large-scale simulations. Starting from the quantum-mechanical foundations of coupled electron--phonon dynamics, we derive computationally efficient approximations for charge capture and emission rates and clearly identify the underlying assumptions and validity regimes. In particular, we introduce an effective crossing-preserving approximation that yields fully analytic, numerically stable, and computationally inexpensive transition rates while retaining the essential quantum-mechanical physics. The resulting expressions are therefore well suited for large-scale device simulations, where capture coefficients must be evaluated repeatedly over broad multidimensional parameter spaces. Furthermore, we derive continuum formulations for transitions between localized defect states and extended electronic bands, enabling direct incorporation into semiconductor-device simulations. The resulting framework bridges microscopic defect physics and practical large-scale simulations of charge transfer processes in complex semiconductor devices. At the same time this work serves as a practical guide for implementing physically grounded NMP-based models, providing both a systematic derivation of the underlying theory and a clear guidance on the validity limits.

cond-mat.mtrl-sci↗

arXiv2026

Device-scaling constraints imposed by the van der Waals gap formed in two-dimensional materials

Transistor miniaturization requires controlling gate leakage through ultrathin dielectrics and minimizing source/drain contact resistance. Although two-dimensional (2D) semiconductors offer excellent electrostatic control, their interfaces with gate dielectrics and contact metals often form a van der Waals (vdW) gap that impacts device performance and acts as a tunneling barrier with a low-dielectric constant. While this reduces dielectric leakage, it increases metal-channel contact resistance and introduces a parasitic series capacitance to the gate. We quantified the trade-off between leakage suppression and electrostatic and contact-resistance scaling limits. As a result, many insulators fail to meet scaling targets, and metal-channel contacts fall short of required resistances. Zipper-like interfaces, where quasi-covalent bonding removes the vdW gap without creating dangling bonds, offer a path toward ultrascaled transistor designs.

cond-mat.mes-hall↗

arXiv2025

Performance and reliability potential of Bi$_2$O$_2$Se/Bi$_2$SeO$_5$ transistors

While 2D materials have enormous potential for future device technologies, many challenges must be overcome before they can be deployed at an industrial scale. One of these challenges is identifying the right semiconductor/insulator combination that ensures high performance, stability, and reliability. In contrast to conventional 2D interfaces, which suffer from van der Waals gaps or covalent bonding issues, zippered structures such as the high-mobility 2D semiconductor Bi$_2$O$_2$Se and its native high-$κ$ oxide Bi$_2$SeO$_5$ offer high-quality interfaces, good scalability, and excellent device performance. While most prior work has focused mainly on basic device behavior, here we also thoroughly assess the stability and reliability of this material system using a multiscale approach that integrates electrical characterization, density functional theory, and TCAD simulations, linking atomistic states to device-scale reliability. By analyzing four transistor design generations (top-gated, fin, and two gate-all-around FETs), we provide realistic predictions for how this system performs at the ultimate scaling limit. We identify oxygen-related defects in the oxide as the main contributors to hysteresis and recoverable threshold shifts, and we propose mitigation strategies through encapsulation or oxygen-rich annealing. Benchmarking the extracted material parameters against IRDS 2037 requirements, we demonstrate that Bi$_2$O$_2$Se/Bi$_2$SeO$_5$ transistors can achieve high drain and low gate currents at ultra-scaled conditions. These findings position this material system as a technologically credible and manufacturing-relevant pathway for future nanoelectronics.

cond-mat.mtrl-sci↗

arXiv2025

Valley Splittings in Si/SiGe Heterostructures from First Principles

We compute valley splittings in Si/SiGe superlattices using ab initio density functional theory (DFT). This first-principle approach is expected to provide an excellent description of interfaces, strains, and atomistic disorder without empirically fitted parameters. We benchmark atomistic tight-binding (TB) and the ``$2k_0$'' theory within the effective mass (EM) approximation against DFT. We show that DFT supports the main conclusions of the 2$k_0$ theory, but reveals some limitations of semi-empirical methods such as the EM and TB, in particular about the description of atomistic disorder. The DFT calculations also highlight the effects of strong valley-orbit mixing at large valley splittings. Nevertheless, TB and the 2$k_0$ theory shall provide reasonable valley splitting statistics in many heterostructures of interest for spin qubit devices.

cond-mat.mtrl-sci↗

arXiv2025

Accurate Modeling of Gate Leakage Currents in SiC Power MOSFETs

Silicon carbide (SiC) metal-oxide-semiconductor field-effect-transistors (MOSFETs) enable high-voltage and high-temperature power conversion. Compared to Si devices, they suffer from pronounced gate leakage due to the reduced electron tunneling barrier at the interface between SiC and amorphous silicon dioxide (a-SiO$_2$). We develop a self-consistent, physics-based simulation framework that couples electrostatics, quantum tunneling, carrier transport, impact ionization, and charge trapping for both electrons and holes. The model quantitatively reproduces measured gate-current-voltage characteristics of SiC MOS capacitors over a wide temperature (80-573 K) range and a wide bias range without empirical fitting. Simulations reveal that conduction electrons in a-SiO$_2$ can trigger impact ionization, which generates electron-hole pairs, and leads to capture of holes in the oxide bulk, thereby enhancing gate leakage current. The framework captures these coupled processes across multiple orders of magnitude in time and field, providing predictive capability for oxide reliability. Although demonstrated for SiC devices, the methodology also applies to Si technologies that uses the same gate dielectric.

cond-mat.mtrl-sci↗

arXiv2025

Resonant states and nuclear dynamics in solid-state systems: the case of silicon-hydrogen bond dissociation

Bond breaking in the presence of highly energetic carriers is central to many important phenomena in physics and chemistry, including radiation damage, hot-carrier degradation, activation of dopant-hydrogen complexes in semiconductors, and photocatalysis. Describing these processes from first principles has remained an elusive goal. Here we introduce a comprehensive theoretical framework for the dissociation process, emphasizing the need for a non-adiabatic approach. We benchmark the results for the case of silicon-hydrogen bond dissocation, a primary process for hot-carrier degradation. Passivation of Si dangling bonds by hydrogen is vital in all Si devices because it eliminates electrically active mid-gap states; understanding the mechanism for dissociation of these bonds is therefore crucial for device technology. While the need for a non-adiabatic approach has been previously recognized, explicitly obtaining diabatic states for solid-state systems has been an outstanding challenge. We demonstrate how to obtain these states by applying a partitioning scheme to the Hamiltonian obtained from first-principles density functional theory. Our results demonstrate that bond dissociation can occur when electrons temporarily occupy the antibonding states, generating a highly repulsive excited-state potential that causes the hydrogen nuclear wavepacket to shift and propagate rapidly. Based on the Menzel-Gomer-Redhead (MGR) model, we show that after moving on this excited-state potential on femtosecond timescales, a portion of the nuclear wavepacket can continue to propagate even after the system relaxes back to the ground state, allowing us to determine the dissociation probability. Our results provide essential insights into the fundamental processes that drive carrier-induced bond breaking in general, and specifically elucidate hydrogen-related degradation in Si devices.

cond-mat.mtrl-sci↗

arXiv2025

Hysteresis Measurements as a Diagnostic Tool: A Systematic Approach for Stability Benchmarking and Performance Projection of 2D-Materials-Based MOSFETs

Judging by its omnipresence in the literature, the hysteresis observed in the transfer characteristics of emerging transistors based on 2D-materials is widely accepted as an important metric related to the device quality. The hysteresis is often reported with attributes like "negligible" or "small" without giving any specifics as to how this was determined and against what reference the measured values were compared to. Quite surprisingly, there appears to be only a fragmentary understanding of the mechanisms actually contributing to hysteresis and the sensitivity of the actual measurement on various experimental parameters. We attempt to close this gap by first providing a comprehensive theoretical analysis of the dominant mechanisms contributing to hysteresis: charge trapping by defects from the channel or the gate, the drift of mobile charges, and eventually ferroelectricity. We continue by suggesting methods to experimentally distinguishing between these phenomena. Based on these discussions it becomes clear that previously reported hysteresis values have little meaning as they have been non-systematically recorded under arbitrary conditions. In order to resolve this predicament, we propose a standardized hysteresis measurement scheme to establish the hysteresis as a comparable metric for the assessment of device stability. Our standardized scheme ensures that hysteresis data can be effectively compared across different technologies and, most importantly, provide a means to extrapolate data obtained on thicker prototypes to subnanometer equivalent oxide thicknesses. This facilitates the systematic benchmarking of insulator/channel combinations in terms of stability, which thereby enables the screening of material systems for more stable and reliable 2D-material-based MOSFETs.

physics.app-ph↗

arXiv2025

How to Identify Suitable Gate Dielectrics for Transistors based on Two-Dimensional Semiconductors

The recent progress in nanosheet transistors has established two-dimensional (2D) semiconductors as viable candidates for future ultra-scaled electronic devices. Next to reducing contact resistance, identifying good gate dielectrics is a fundamental challenge, as the dielectric/channel interface dramatically impacts virtually all performance parameters. While several promising gate dielectrics have recently been reported, the evaluation of their quality and suitability is often fragmentary and focused on selected important performance metrics of the gate stack, such as the capacitive gate control, leakage currents, reliability, and ease of fabrication and integration. However, identifying a suitable gate stack is a complex problem that has not yet been approached systematically. In this perspective, we aim to formulate general criteria for good gate dielectrics.

physics.app-ph↗

arXiv2024

Machine Learning Force Field for Thermal Oxidation of Silicon

Looking back at seven decades of highly extensive application in the semiconductor industry, silicon and its native oxide SiO$_2$ are still at the heart of several technological developments. Recently, the fabrication of ultra-thin oxide layers has become essential for keeping up with trends in down-scaling of nanoelectronic devices and for the realization of novel device technologies. With this comes a need for better understanding of the atomic configuration at the Si/SiO$_2$ interface. Classical force fields offer flexible application and relatively low computational costs, however, suffer from limited accuracy. Ab-initio methods give much better results but are extremely costly. Machine learning force fields (MLFF) offer the possibility to combine the benefits of both worlds. We train a MLFF for the simulation of the dry thermal oxidation process of a Si substrate. The training data is generated by density functional theory calculations. The obtained structures are in line with ab-initio simulations as well as with experimental observations. Compared to a classical force field, the most recent reactive force field (reaxFF), the resulting configurations are vastly improved.

cond-mat.mtrl-sci↗

arXiv2024

Coherence limit due to hyperfine interaction with nuclei in the barrier material of Si spin qubits

On the quest to understand and reduce environmental noise in Si spin qubits, hyperfine interactions between electron and nuclear spins impose a major challenge. Silicon is a promising host material because one can enhance the spin coherence time by removing spinful $^{29}$Si isotopes. As more experiments rely on isotopic purification of Si, the role of other spinful atoms in the device should be clarified. This is not a straightforward task, as the hyperfine interactions with atoms in the barrier layers are poorly understood. We utilize density functional theory to determine the hyperfine tensors of both Si and Ge in a crystalline epitaxial Si/SiGe quantum well as well as Si and O atoms in an amorphous Si/SiO$_2$ (MOS) interface structure. Based on these results, we estimate the dephasing time $T_2^*$ due to magnetic noise from the spin bath and show that the coherence is limited by interactions with non-Si barrier atoms to a few \textmu s in Si/SiGe (for non-purified Ge) and about 100\,\textmu s in Si-MOS. Expressing these numbers alternatively, in Si/SiGe the interactions with Ge dominate below 1000\,ppm of $^{29}$Si content, and, due to low natural concentration of the spinful oxygen isotopes, the interactions with oxygen in Si-MOS become significant only below 1\,ppm of $^{29}$Si content.

cond-mat.mes-hall↗

arXiv2024

Time-Gated Optical Spectroscopy of Field-Effect Stimulated Recombination via Interfacial Point Defects in Fully-Processed Silicon Carbide Power MOSFETs

Fully-processed SiC power metal-oxide-semiconductor field-effect transistors (MOSFETs) emit light during switching of the gate terminal, while both drain and source terminals are grounded. The emitted photons are caused by defect-assisted recombination of electrons and holes at the 4H-SiC/SiO$_2$ interface and can be detected through the SiC substrate. Here, we present time-gated spectroscopic characterization of these interfacial point defects. Unlike in previous studies, the devices were opened in such a way that the drain-contact remained electrically active. A separate examination of the photons emitted at the rising and falling transitions of the gate-source voltage enabled the extraction of two different spectral components. One of these components consists of a single transition with phonon replicas of a local vibrational mode (LVM) with an astonishingly high energy of 220 meV $\unicode{x2013}$ well above the highest phonon modes in 4H-SiC and SiO$_2$ of 120 meV and 137 meV, respectively. Based on a quantum mechanical model, we successfully fitted its emission spectrum and assigned it to donor-acceptor pair recombination involving a carbon cluster-like defect. Other transitions were assigned to EH$_{6/7}$-assisted, EK$_2$-D, and nitrogen-aluminum donor-acceptor pair recombination. Due to the relevance of these defects in the operation of SiC MOSFETs, these novel insights will contribute to improved reliability and performance of these devices.

physics.app-ph↗

arXiv2023

Variability and Reliability of Graphene Field-Effect Transistors with CaF2 Insulators

Graphene is a promising material for applications as a channel in graphene field-effect transistors (GFETs) which may be used as a building block for optoelectronics, high-frequency devices and sensors. However, these devices require gate insulators which ideally should form atomically flat interfaces with graphene and at the same time contain small densities of traps to maintain high device stability. Previously used amorphous oxides, such as SiO2 and Al2O3, however, typically suffer from oxide dangling bonds at the interface, high surface roughness and numerous border oxide traps. In order to address these challenges, here we use for the first time 2nm thick epitaxial CaF2 as a gate insulator in GFETs. By analyzing device-to-device variability for over 200 devices fabricated in two batches, we find that tens of them show similar gate transfer characteristics. Our statistical analysis of the hysteresis up to 175C has revealed that while an ambient-sensitive counterclockwise hysteresis can be present in some devices, the dominant mechanism is thermally activated charge trapping by border defects in CaF2 which results in the conventional clockwise hysteresis. We demonstrate that both the hysteresis and bias-temperature instabilities in our GFETs with CaF2 are comparable to similar devices with SiO2 and Al2O3. In particular, we achieve a small hysteresis below 0.01 V for equivalent oxide thickness (EOT) of about 1 nm at the electric fields up to 15 MV/cm and sweep times in the kilosecond range. Thus, our results demonstrate that crystalline CaF2 is a promising insulator for highly-stable GFETs.

physics.app-ph↗

arXiv2022

Comphy v3.0 -- A Compact-Physics Framework for Modeling Charge Trapping Related Reliability Phenomena in MOS Devices

Charge trapping plays an important role for the reliability of electronic devices and manifests itself in various phenomena like bias temperature instability (BTI), random telegraph noise (RTN), hysteresis or trap-assisted tunneling (TAT). In this work we present Comphy v3.0, an open source physical framework for modeling these effects in a unified fashion using nonradiative multiphonon theory on a one-dimensional device geometry. Here we give an overview about the underlying theory, discuss newly introduced features compared to the original Comphy framework and also review recent advances in reliability physics enabled by these new features. The usefulness of Comphy v3.0 for the reliability community is highlighted by several practical examples including automatic extraction of defect distributions, modeling of TAT in high-k capacitors and BTI/RTN modeling at cryogenic temperatures.

physics.app-ph↗

arXiv2022

Modeling the Initial Stages of Si(100) Thermal Oxidation: An Ab-initio Approach

Silicon together with its native oxide SiO$_2$ was recognized as an outstanding material system for the semiconductor industry in the 1950s. In state-of-the-art device technology, SiO$_2$ is widely used as an insulator in combination with high-$k$ dielectrics such as HfO$_2$, demanding fabrication of ultra-thin interfacial layers. The classical standard model derived by Deal and Grove accurately describes the oxidation of Si in a progressed stage, however, strongly underestimates growth rates for thin oxide layers. Recent studies report a variety of oxidation mechanisms during the growth of oxide films in the range of \SI{10}{\angstrom} with various details still under debate. This paper presents a first-principles based approach to theoretically assess the thermal oxidation process of the technologically relevant Si(100) surfaceduring this initial stage. Our investigations range from the chemisorption of single O$_2$ molecules onto the $p(2\times2)$ reconstructed Si surface to oxidized Si surface layers with a thickness of up to \SI{20}{\angstrom}. The initially observed enhanced growth rate is assigned to barrierless O$_2$ chemisorption events upon which the oxygen molecule dissociate. We present strong evidence for an immediate amorphization of the oxide layer from the onset of oxidation. Surface reactions dominate until the surface is saturated with oxygen and separated from the Si substrate by a \SI{5}{\angstrom} transition region. The saturated surface becomes inert to dissociative reactions and enables the diffusion of molecular oxygen to the \interface interface as assumed within the Deal-Grove model. Further oxidation of the Si substrate is then provided by O$_2$ dissociations at the interface due to the same charge transfer process responsible for the chemisorption at the surface.

cond-mat.mtrl-sci↗

arXiv2021

Epitaxial growth of crystalline CaF$_2$ on silicene

Silicene is one of the most promising 2D materials for the realization of next-generation electronic devices, owing to its high carrier mobility and bandgap tunability through the imposition of an external electric field. To exploit this fundamental characteristic, it is necessary to engineer an insulating layer that can be interfaced directly to silicene without perturbing its bidimensional nature. At the same time, this insulating layer should exhibit low leakage currents even when highly scaled, to fully exploit the advantages of using a 2D material at the core of the device. CaF$_2$ is known to form a quasi van der Waals interface with 2D materials, as well as to maintain its insulating properties even at ultrathin scales. Here we investigate the growth of CaF$_2$ layers on silicene by molecular beam epitaxy: diffraction images show that CaF$_2$ grows epitaxially on silicene/Ag(111), with its domains fully aligned to the 2D silicon lattice. In-situ XPS analysis evidences that no changes in the chemical state of the silicon atoms can be detected upon CaF$_2$ deposition, excluding the formation of covalent bonds between Ca, F and Si. Polarized Raman analysis shows that silicene undergoes a structural change upon interaction with CaF$_2$, however retaining a bidimensional character and without transitioning to a sp3-hybridized, bulk-like silicon.

cond-mat.mtrl-sci↗

arXiv2021

Optimizing the Stability of FETs Based on Two-Dimensional Materials by Fermi Level Tuning

Despite the enormous progress achieved during the past decade, nanoelectronic devices based on two-dimensional (2D) semiconductors still suffer from a limited electrical stability. This limited stability has been shown to result from the interaction of charge carriers originating from the 2D semiconductors with defects in the surrounding insulating materials. The resulting dynamically trapped charges are particularly relevant in field effect transistors (FETs) and can lead to a large hysteresis, which endangers stable circuit operation. Based on the notion that charge trapping is highly sensitive to the energetic alignment of the channel Fermi-level with the defect band in the insulator, we propose to optimize device stability by deliberately tuning the channel Fermi-level. Our approach aims to minimize the amount of electrically active border traps without modifying the total number of traps in the insulator. We demonstrate the applicability of this idea by using two differently doped graphene layers in otherwise identical FETs with Al$_2$O$_3$ as a gate oxide mounted on a flexible substrate. Our results clearly show that by increasing the distance of the Fermi-level to the defect band, the hysteresis is significantly reduced. Furthermore, since long-term reliability is also very sensitive to trapped charges, a corresponding improvement in reliability is both expected theoretically and demonstrated experimentally. Our study paves the way for the construction of more stable and reliable 2D FETs in which the channel material is carefully chosen and tuned to maximize the energetic distance between charge carriers in the channel and the defect bands in the insulator employed.

physics.app-ph↗

arXiv2020

On the suitability of hBN as an insulator for 2D material-based ultrascaled CMOS devices

Complementary metal oxide semiconductor (CMOS) logic circuits at the ultimate scaling limit place the utmost demands on the properties of all materials involved. The requirements for semiconductors are well explored and could possibly be satisfied by a number of layered two-dimensional (2D) materials, like for example transition-metal dichalcogenides or black phosphorus. The requirements for the gate insulator are arguably even more challenging and difficult to meet. In particular the combination of insulator to semiconductor which forms the central element of the metal oxide semiconductor field effect transistor (MOSFET) has to be of superior quality in order to build competitive devices. At the moment, hexagonal boron nitride (hBN) is the most common two-dimensional insulator and widely considered to be the most promising gate insulator in nanoscaled 2D material-based transistors. Here, we critically assess the material parameters of hBN and conclude that while its properties render hBN an ideal candidate for many applications in 2D nanoelectronics, hBN is most likely not suitable as a gate insulator for ultrascaled CMOS devices.

physics.app-ph↗

arXiv2019

Meeting the Scaling Challenge for Post-Silicon Nanoelectronics using CaF2 Insulators

Two-dimensional (2D) semiconductors have been suggested both for ultimately-scaled field-effect transistors (FETs) and More-than-Moore nanoelectronics. However, these targets can not be reached without accompanying gate insulators which are scalable into the nanometer regime. Despite the considerable progress in the search for channel materials with high mobilities and decent bandgaps, finding high-quality insulators compatible with 2D technologies has remained a challenge. Typically used oxides (e.g. SiO2, Al2O3 and HfO2) are amorphous when scaled, while two-dimensional hBN exhibits excessive gate leakages. To overcome this bottleneck, we extend the natural stacking properties of 2D heterostructures to epitaxial fluorite (CaF2), which forms a quasi van der Waals interface with 2D semiconductors. We report scalable single-layer MoS2 FETs with a crystalline CaF2 insulator of about 2 nm thickness, which corresponds to an equivalent oxide thickness of less than 1 nm. While meeting the stringent requirements of low leakage currents, our devices exhibit highly competitive performance and record-small hysteresis. As such, our results present a breakthrough for very large scale integration towards commercially competitive nano-electronic devices.

physics.app-ph↗