SearcharxivSearch

arXiv subjects

Tomasz Hemperek

Publications and source records attributed to Tomasz Hemperek.

At least 19 recordsLinked to original sources

Development of non amplified Depleted MAPS sensors towards 50 ps timing resolution on charged particles

The MiniCactus sensors are demonstrator sensors designed in LFoundry LF15A 150 nm technology, intended to study the performance of non amplified High Voltage High Resistivity CMOS sensors for measurement of time of arrival of charged particles. This paper presents the context, design features and some of the first test-beam results obtained with the latest MiniCactus sensor version, MiniCactus V2. With a 175 micron thick sensor biased at -350 V, we have obtained a 60 ps time resolution on Minimum Ionizing Particles detected with a 500 micron by 500 micron pixel.

physics.ins-det

X-ray Irradiation Studies on the Monopix DMAPS in 150$\,$nm and 180$\,$nm

Monolithic active pixel sensors with depleted substrates present a promising option for pixel detectors in high-radiation environments. High-resistivity silicon substrates and high bias voltage capabilities in commercial CMOS technologies facilitate depletion of the charge sensitive volume. TJ-Monopix2 and LF-Monopix2 are the most recent large-scale chips in their respective development line, aiming for the ATLAS Inner Tracker outer layer requirements. Those include a tolerance to ionizing radiation of up to 100$\,$Mrad. It was evaluated by irradiating both devices with X-rays to the corresponding ionization dose, showing no significant degradation of the performance at 100$\,$Mrad and continuous operability throughout the irradiation campaign.

physics.ins-det

Characterisation and simulation of stitched CMOS strip sensors

In high-energy physics, there is a need to investigate alternative silicon sensor concepts that offer cost-efficient, large-area coverage. Sensors based on CMOS imaging technology present such a silicon sensor concept for tracking detectors. The CMOS Strips project investigates passive CMOS strip sensors fabricated by LFoundry in a 150nm technology. By employing the technique of stitching, two different strip sensor formats have been realised. The sensor performance is characterised based on measurements at the DESY II Test Beam Facility. The sensor response was simulated utilising Monte Carlo methods and electric fields provided by TCAD device simulations. This study shows that employing the stitching technique does not affect the hit detection efficiency. A first look at the electric field within the sensor and its impact on generated charge carriers is being discussed.

physics.ins-det

Breakdown Performance of Guard Ring Designs for Pixel Detectors in $150~\mathrm{nm}$ CMOS Technology

Silicon pixel sensors manufactured using commercial CMOS processes are promising instruments for high-energy particle physics experiments due to their high yield and proven radiation hardness. As one of the essential factors for the operation of detectors, the breakdown performance of pixel sensors constitutes the upper limit of the operating voltage. Six types of passive CMOS test structures were fabricated on high-resistivity wafers. Each of them features a combination of different inter-pixel designs and sets of floating guard rings, which differ from each other in the geometrical layout, implantation type, and overhang structure. A comparative study based on leakage current measurements in the sensor substrate of unirradiated samples was carried out to identify correlations between guard ring designs and breakdown voltages. TCAD simulations using the design parameters of the test structures were performed to discuss the observations and, together with the measurements, ultimately provide design features targeting higher breakdown voltages.

physics.ins-det

Cross talk of a large-scale depleted monolithic active pixel sensor (DMAPS) in 180 nm CMOS technology

Monolithic pixel detectors combine readout electronics and sensor in a single entity of silicon, which simplifies the production procedure and lowers the material budget compared to conventional hybrid pixel detector concepts. Benefiting from the advances in commercial CMOS processes towards large biasing voltage capabilities and the increasing availability of high-resistivity substrates, depleted monolithic active pixel sensors (DMAPS) are able to cope with the high-rate and high-radiation environments faced in modern high-energy physics experiments. TJ-Monopix2 is the latest iteration of a DMAPS development line designed in 180 nm TowerSemicondutor technology, which features a large scale (2 x 2) cm$^2$ chip divided into (512 x 512) pixels with a pitch of (33 x 33) um$^2$. All in-pixel electronics are separated from its small collection electrode and process modifications are implemented to improve charge collection efficiency especially after irradiation. The latest laboratory measurements and investigations of a threshold variation observed for TJ-Monopix2 in typical operating conditions are presented.

physics.ins-det

MiniCACTUS: A 65 ps Time Resolution Depleted Monolithic CMOS Sensor

MiniCACTUS is a monolithic sensor prototype optimised for timing measurement of charged particles. It has been designed in a standard 150 nm CMOS process without dedicated amplification layer. It is intended as a demonstrator chip for future large scale timing detectors, like upgrades of timing detectors at LHC, or future high energy physics detector projects. The sensor features an active array of 2 x 4 diodes, analog and digital Front-Ends (FEs), a slow control interface, and bias circuitry programmable through internal DACs. The sensing element is a deep n-well/p-substrate diode. Thanks to the optimized guard-rings surrounding the whole chip, it is possible to apply safely more than 450 V on the high-resistivity substrate allowing fast charge collection. The baseline pixel dimensions are 1.0 mm x 1.0 mm and 0.5 mm x 1.0 mm. The analog FEs and the discriminators for each pixel are implemented outside the pixel, at the column level. The power consumption is approximately 300 mW/cm$\mathbf {^2}$, which is compatible with cooling infrastructure available at LHC experiments, and making integration of this concept viable in future high energy physics experiments. After fabrication, the sensors have been thinned to 100 $μ$m, 200 $μ$m and 300 $μ$m total thickness and then post-processed for backside biasing. The time resolution of several sensors with different thicknesses has been measured in 3 test-beam campaigns using high energy muons (Minimum Ionizing Particles) at CERN SPS in 2021 and 2022. A resolution of 65.3 ps has been measured with on-chip FE and discriminator. This paper will focus on the results of these test-beam campaigns.

physics.ins-det

Charge collection and efficiency measurements of the TJ-Monopix2 DMAPS in 180$\,$nm CMOS technology

Monolithic CMOS pixel detectors have emerged as competitive contenders in the field of high-energy particle physics detectors. By utilizing commercial processes they offer high-volume production of such detectors. A series of prototypes has been designed in a 180$\,$nm Tower process with depletion of the sensor material and a column-drain readout architecture. The latest iteration, TJ-Monopix2, features a large 2$\,$cm x 2$\,$cm matrix consisting of 512 x 512 pixels with 33.04$\,$um pitch. A small collection electrode design aims at low power consumption and low noise while the radiation tolerance for high-energy particle detector applications needs extra attention. With a goal to reach radiation tolerance to levels of $10^{15}\,1\,$MeV n$_\text{eq}\,$cm$^{-2}$ of NIEL damage a modification of the standard process has been implemented by adding a low-dosed n-type silicon implant across the pixel in order to allow for homogeneous depletion of the sensor volume. Recent lab measurements and beam tests were conducted for unirradiated modules to study electrical characteristics and hit detection efficiency.

physics.ins-det

Characterization of Passive CMOS Strip Sensors

Recent advances in CMOS imaging sensor technology , e.g. in CMOS pixel sensors, have proven that the CMOS process is radiation tolerant enough to cope with certain radiation levels required for tracking layers in hadron collider experiments. With the ever-increasing area covered by silicon tracking detectors cost effective alternatives to the current silicon sensors and more integrated designs are desirable. This article describes results obtained from laboratory measurements of silicon strip sensors produced in a passive p-CMOS process. Electrical characterization and charge collection measurements with a 90Sr source and a laser with infrared wavelength showed no effect of the stitching process on the performance of the sensor.

physics.ins-det

Characterization of passive CMOS sensors with RD53A pixel modules

Both the current upgrades to accelerator-based HEP detectors (e.g. ATLAS, CMS) and also future projects (e.g. CEPC, FCC) feature large-area silicon-based tracking detectors. We are investigating the feasibility of using CMOS foundries to fabricate silicon radiation detectors, both for pixels and for large-area strip sensors. A successful proof of concept would open the market potential of CMOS foundries to the HEP community, which would be most beneficial in terms of availability, throughput and cost. In addition, the availability of multi-layer routing of signals will provide the freedom to optimize the sensor geometry and the performance, with biasing structures implemented in poly-silicon layers and MIM-capacitors allowing for AC coupling. A prototyping production of strip test structures and RD53A compatible pixel sensors was recently completed at LFoundry in a 150nm CMOS process. This presentation will focus on the characterization of pixel modules, studying the performance in terms of charge collection, position resolution and hit efficiency with measurements performed in the laboratory and with beam tests. We will report on the investigation of RD53A modules with 25x100 mu^2 cell geometry.

physics.ins-det

Radiation tolerant, thin, passive CMOS sensors read out with the RD53A chip

The radiation hardness of passive CMOS pixel sensors fabricated in 150 nm LFoundry technology is investigated. CMOS process lines are especially of interest for large-scale silicon detectors as they offer high production throughput at comparatively low cost. Moreover, several features like poly-silicon resistors, MIM-capacitors and several metal layers are available which can help enhance the sensor design. The performance of a 100 $\mathrmμ$m thin passive CMOS sensor with a pixel pitch of 50 $\mathrmμ$m at different irradiation levels, 5 $\times$ 10$^{15}$n$_{\mathrm{eq}}$cm$^{-2}$ and 1 $\times$ 10$^{16}$n$_{\mathrm{eq}}$cm$^{-2}$, is presented. The sensor was bump-bonded and read out using the RD53A readout chip. After the highest fluence a hit-detection efficiency larger than 99% is measured for minimum ionising particles. The measured equivalent noise charge is comparable to conventional planar pixel sensors. Passive CMOS sensors are thus an attractive option for silicon detectors operating in radiation harsh environments like the upgrades for the LHC experiments.

physics.ins-det

BDAQ53, a versatile pixel detector readout and test system for the ATLAS and CMS HL-LHC upgrades

BDAQ53 is a readout system and verification framework for hybrid pixel detector readout chips of the RD53 family. These chips are designed for the upgrade of the inner tracking detectors of the ATLAS and CMS experiments. BDAQ53 is used in applications where versatility and rapid customization are required, such as in laboratory testing environments, test beam campaigns, and permanent setups for quality control measurements. It consists of custom and commercial hardware, a Python-based software framework, and FPGA firmware. BDAQ53 is developed as open source software with both software and firmware being hosted in a public repository.

physics.ins-det

Improving the Spatial Resolution of Silicon Pixel Detectors through Sub-pixel Cross-coupling

We present a concept to improve the spatial resolution of silicon pixel-detectors via the implementation of a sub-pixel cross-coupling, which introduces directional charge sharing between pixels. The charge-collection electrode is segmented into sub-pixels and each sub-pixel is coupled to the closest sub-pixel of the neighboring pixel. Such coupling schema is evaluated for a model sensor design with $50 μm \times 50 μm$ pixels and AC-coupled sub-pixels. A first-order SPICE simulation is used, to determine feasible coupling strengths and assess the influence on the charge-collection efficiency. The impact of the coupling strength on spatial resolution is studied with a dedicated simulation, taking into account charge-cloud evolution, energy-loss straggling, electronic noise, and the charge detection-threshold. Using simplifying assumptions, such as perpendicular tracks and no gaps between charge-collection electrodes, an improvement of the spatial resolution by up to approximately $30\%$ is obtained in comparison to the standard planar pixel layout.

physics.ins-det

DMAPS Monopix developments in large and small electrode designs

LF-Monopix1 and TJ-Monopix1 are depleted monolithic active pixel sensors (DMAPS) in 150 nm LFoundry and 180 nm TowerJazz CMOS technologies respectively. They are designed for usage in high-rate and high-radiation environments such as the ATLAS Inner Tracker at the High-Luminosity Large Hadron Collider (HL-LHC). Both chips are read out using a column-drain readout architecture. LF-Monopix1 follows a design with large charge collection electrode where readout electronics are placed inside. Generally, this offers a homogeneous electrical field in the sensor and short drift distances. TJ-Monopix1 employs a small charge collection electrode with readout electronics separated from the electrode and an additional n-type implant to achieve full depletion of the sensitive volume. This approach offers a low sensor capacitance and therefore low noise and is typically implemented with small pixel size. Both detectors have been characterized before and after irradiation using lab tests and particle beams.

physics.ins-det

CACTUS: A depleted monolithic active timing sensor using a CMOS radiation hard technology

The planned luminosity increase at the Large Hadron Collider in the coming years has triggered interest in the use of the particles' time of arrival as additional information in specialized detectors to mitigate the impact of pile-up. The required time resolution is of the order of tens of picoseconds, with a spatial granularity of the order of 1 mm. A time measurement at this precision level will also be of interest beyond the LHC and beyond high energy particle physics. We present in this paper the first developments towards a radiation hard Depleted Monolithic Active Pixel Sensor (DMAPS), with high-resolution time measurement capability. The technology chosen is a standard high voltage CMOS process, in conjunction with a high resistivity detector material, which has already proven to efficiently detect particles in tracking applications after several hundred of Mrad of irradiation.

physics.ins-det

The Monopix chips: Depleted monolithic active pixel sensors with a column-drain read-out architecture for the ATLAS Inner Tracker upgrade

Two different depleted monolithic CMOS active pixel sensor (DMAPS) prototypes with a fully synchronous column-drain read-out architecture were designed and tested: LF-Monopix and TJ-Monopix. These chips are part of a R&D effort towards a suitable implementation of a CMOS DMAPS for the HL-LHC ATLAS Inner Tracker. LF-Monopix was developed using a 150nm CMOS process on a highly resistive substrate (>2 k$Ω\,$cm), while TJ-Monopix was fabricated using a modified 180 nm CMOS process with a 1 k$Ω\,$cm epi-layer for depletion. The chips differ in their front-end design, biasing scheme, pixel pitch, dimensions of the collecting electrode relative to the pixel size (large and small electrode design, respectively) and the placement of read-out electronics within such electrode. Both chips were operational after thinning down to 100 $\mathrmμ$m and additional back-side processing in LF-Monopix for total bulk depletion. The results in this work include measurements of their leakage current, noise, threshold dispersion, response to minimum ionizing particles and efficiency in test beam campaigns. In addition, the outcome from measurements after irradiation with neutrons up to a dose of $1\times10^{15}\,\mathrm{n_{eq} / cm}^{2}$ and its implications for future designs are discussed.

physics.ins-det

Depleted Fully Monolithic Active CMOS Pixel Sensors (DMAPS) in High Resistivity 150~nm Technology for LHC

Depleted monolithic CMOS active pixel sensors (DMAPS) have been developed in order to demonstrate their suitability as pixel detectors in the outer layers of a toroidal LHC apparatus inner tracker (ATLAS ITk) pixel detector in the high-luminosity large hadron collider (HL-LHC). Two prototypes have been fabricated using 150 nm CMOS technology on high resistivity (> 2 k$Ω$ $cm^2$) wafers. The chip size is equivalent to that of the current ATLAS pixel detector readout chip. One of the prototypes is used for detailed characterization of the sensor and the analog readout of the DMAPS. The other is a fully monolithic DMAPS including fast readout digital logic that handles the required hit rate. In order to yield a strong homogeneous electric field within the sensor volume, thinning of the wafer was tested. The prototypes were irradiated with X-ray up to a total ionization dose (TID) of 50 Mrad and with neutrons up to non-ionizing energy loss (NIEL) of $10^{15}$ $n_{eq}/cm^2$. The analog readout circuitry maintained its performance after TID irradiation, and the hit-efficiency at > $10^7$ noise occupancy was as high as 98.9 % after NIEL irradiation.

physics.ins-det

Characterization and Verification Environment for the RD53A Pixel Readout Chip in 65 nm CMOS

The RD53 collaboration is currently designing a large scale prototype pixel readout chip in 65 nm CMOS technology for the phase 2 upgrades at the HL-LHC. The RD53A chip will be available by the end of the year 2017 and will be extensively tested to confirm if the circuit and the architecture make a solid foundation for the final pixel readout chips for the experiments at the HL-LHC. A test and data acquisition system for the RD53A chip is currently under development to perform single-chip and multi-chip module measurements. In addition, the verification of the RD53A design is performed in a dedicated simulation environment. The concept and the implementation of the test and data acquisition system and the simulation environment, which are based on a modular data acquisition and system testing framework, are presented in this work.

physics.ins-det

Development of depleted monolithic pixel sensors in 150 nm CMOS technology for the ATLAS Inner Tracker upgrade

This work presents a depleted monolithic active pixel sensor (DMAPS) prototype manufactured in the LFoundry 150 nm CMOS process. The described device, named LF-Monopix, was designed as a proof of concept of a fully monolithic sensor capable of operating in the environment of outer layers of the ATLAS Inner Tracker upgrade for the High Luminosity Large Hadron Collider (HL-LHC). Implementing such a device in the detector module will result in a lower production cost and lower material budget compared to the presently used hybrid designs. In this paper the chip architecture will be described followed by the simulation and measurement results.

physics.ins-det