arXiv subjects

Tomasz Hemperek

Publications and source records attributed to Tomasz Hemperek.

24 records · Page 2Linked to original sources

arXiv2017

Neutron irradiation test of depleted CMOS pixel detector prototypes

Charge collection properties of depleted CMOS pixel detector prototypes produced on p-type substrate of 2 k$Ω$cm initial resistivity (by LFoundry 150 nm process) were studied using Edge-TCT method before and after neutron irradiation. The test structures were produced for investigation of CMOS technology in tracking detectors for experiments at HL-LHC upgrade. Measurements were made with passive detector structures in which current pulses induced on charge collecting electrodes could be directly observed. Thickness of depleted layer was estimated and studied as function of neutron irradiation fluence. An increase of depletion thickness was observed after first two irradiation steps to 1$\cdot$10$^{13}$ n/cm$^{2}$ and 5$\cdot$10$^{13}$ n/cm$^{2}$ and attributed to initial acceptor removal. At higher fluences the depletion thickness at given voltage decreases with increasing fluence because of radiation induced defects contributing to the effective space charge concentration. The behaviour is consistent with that of high resistivity silicon used for standard particle detectors. The measured thickness of the depleted layer after irradiation with 1$\cdot$10$^{15}$ n/cm$^{2}$ is more than 50 $μ$m at 100 V bias. This is sufficient to guarantee satisfactory signal/noise performance on outer layers of pixel trackers in HL-LHC experiments.

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arXiv2016

Characterization of Fully Depleted CMOS Active Pixel Sensors on High Resistivity Substrates for Use in a High Radiation Environment

Depleted CMOS active sensors (DMAPS) are being developed for high-energy particle physics experiments in high radiation environments, such as in the ATLAS High Luminosity Large Hadron Collider (HL-LHC). Since charge collection by drift is mandatory for harsh radiation environment, the application of high bias voltage to high resistive sensor material is needed. In this work, a prototype of a DMAPS was fabricated in a 150nm CMOS process on a substrate with a resistivity of >2 kΩcm that was thinned to 100 μm. Full depletion occurs around 20V, which is far below the breakdown voltage of 110 V. A readout chip has been attached for fast triggered readout. Presented prototype also uses a concept of sub-pixel en/decoding three pixels of the prototype chip are readout by one pixel of the readout chip. Since radiation tolerance is one of the largest concerns in DMAPS, the CCPD_LF chip has been irradiated with X-rays and neutrons up to a total ionization dose of 50 Mrad and a fluence of 10E15neq/cm2, respectively.

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arXiv2016

Prototype Active Silicon Sensor in 150 nm HR-CMOS Technology for ATLAS Inner Detector Upgrade

The LHC Phase-II upgrade will lead to a significant increase in luminosity, which in turn will bring new challenges for the operation of inner tracking detectors. A possible solution is to use active silicon sensors, taking advantage of commercial CMOS technologies. Currently ATLAS R&D programme is qualifying a few commercial technologies in terms of suitability for this task. In this paper a prototype designed in one of them (LFoundry 150 nm process) will be discussed. The chip architecture will be described, including different pixel types incorporated into the design, followed by simulation and measurement results.

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arXiv2015

A Monolithic active pixel sensor for ionizing radiation using a 180nm HV-SOI process

An improved SOI-MAPS (Silicon On Insulator Monolithic Active Pixel Sensor) for ionizing radiation based on thick-film High Voltage SOI technology (HV-SOI) has been developed. Similar to existing Fully Depleted SOI-based (FD-SOI) MAPS, a buried silicon oxide inter-dielectric (BOX) layer is used to separate the CMOS electronics from the handle wafer which is used as a depleted charge collection layer. FD-SOI MAPS suffer from radiation damage such as transistor threshold voltage shifts due to charge traps in the oxide layers and charge states created at the silicon oxide boundaries (back gate effect). The X-FAB 180-nm HV-SOI technology offers an additional isolation by deep non-depleted implant between the BOX layer and the active circuitry witch mitigates this problem. Therefore we see in this technology a high potential to implement radiation-tolerant MAPS with fast charge collection property. The design and measurement results from a first prototype are presented including charge collection in neutron irradiated samples.

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arXiv2014

A method for precise charge reconstruction with pixel detectors using binary hit information

A method is presented to precisely reconstruct charge spectra with pixel detectors using binary hit information of individual pixels. The method is independent of the charge information provided by the readout circuitry and has a resolution mainly limited by the electronic noise. It relies on the ability to change the detection threshold in small steps while counting hits from a particle source. The errors are addressed and the performance of the method is shown based on measurements with the ATLAS pixel chip FE-I4 bump bonded to a 230 μm 3D-silicon sensor. Charge spectra from radioactive sources and from electron beams are presented serving as examples. It is demonstrated that a charge resolution (σ<200 e) close to the electronic noise of the ATLAS FE-I4 pixel chip can be achieved.

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arXiv2014

DMAPS: a fully depleted monolithic active pixel sensor - analog performance characterization

Monolithic Active Pixel Sensors (MAPS) have been developed since the late 1990s based on silicon substrates with a thin epitaxial layer (thickness of 10-15 $μ$m) in which charge is collected on an electrode, albeit by disordered and slow diffusion rather than by drift in a directed electric field. As a consequence, the signal is small ($\approx$ 1000 e$^-$) and the radiation tolerance is much below the LHC requirements by factors of 100 to 1000. In this paper we present the development of a fully Depleted Monolithic Active Pixel Sensors (DMAPS) based on a high resistivity substrate allowing the creation of a fully depleted detection volume. This concept overcomes the inherent limitations of charge collection by diffusion in the standard MAPS designs. We present results from a test chip EPCB01 designed in a commercial 150 nm CMOS technology. The technology provides a thin (50 $μ$m) high resistivity n-type silicon substrate as well as an additional deep p-well which allows to integrate full CMOS circuitry inside the pixel. Different matrix types with several variants of collection electrodes have been implemented. Measurements of the analog performance of this first implementation of DMAPS pixels will be presented.

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