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V. Cindro

Publications and source records attributed to V. Cindro.

24 records · Page 2Linked to original sources

Production and Integration of the ATLAS Insertable B-Layer

During the shutdown of the CERN Large Hadron Collider in 2013-2014, an additional pixel layer was installed between the existing Pixel detector of the ATLAS experiment and a new, smaller radius beam pipe. The motivation for this new pixel layer, the Insertable B-Layer (IBL), was to maintain or improve the robustness and performance of the ATLAS tracking system, given the higher instantaneous and integrated luminosities realised following the shutdown. Because of the extreme radiation and collision rate environment, several new radiation-tolerant sensor and electronic technologies were utilised for this layer. This paper reports on the IBL construction and integration prior to its operation in the ATLAS detector.

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Charge collection properties of irradiated depleted CMOS pixel test structures

Edge-TCT and charge collection measurements with passive test structures made in LFoundry 150 nm CMOS process on p-type substrate with initial resistivity of over 3 k$Ω$cm are presented. Measurements were made before and after irradiation with reactor neutrons up to 2$\cdot$10$^{15}$ n$_{\mathrm{eq}}$/cm$^2$. Two sets of devices were investigated: unthinned (700 $μ$m) with substrate biased through the implant on top and thinned (200 $μ$m) with processed and metallised back plane. Depleted depth was estimated with Edge-TCT and collected charge was measured with $^{90}$Sr source using an external amplifier with 25 ns shaping time. Depleted depth at given bias voltage decreased with increasing neutron fluence but it was still larger than 70 $μ$m at 250 V after the highest fluence. After irradiation much higher collected charge was measured with thinned detectors with processed back plane although the same depleted depth was observed with Edge-TCT. Most probable value of collected charge of over 5000 electrons was measured also after irradiation to 2$\cdot$10$^{15}$ n$_{\mathrm{eq}}$/cm$^2$. This is sufficient to ensure successful operation of these detectors at the outer layer of the pixel detector in the ATLAS experiment at the upgraded HL-LHC.

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Radiation Hardness of Thin Low Gain Avalanche Detectors

Low Gain Avalanche Detectors (LGAD) are based on a n++-p+-p-p++ structure where an appropriate doping of the multiplication layer (p+) leads to high enough electric fields for impact ionization. Gain factors of few tens in charge significantly improve the resolution of timing measurements, particularly for thin detectors, where the timing performance was shown to be limited by Landau fluctuations. The main obstacle for their operation is the decrease of gain with irradiation, attributed to effective acceptor removal in the gain layer. Sets of thin sensors were produced by two different producers on different substrates, with different gain layer doping profiles and thicknesses (45, 50 and 80 um). Their performance in terms of gain/collected charge and leakage current was compared before and after irradiation with neutrons and pions up to the equivalent fluences of 5e15 cm-2. Transient Current Technique and charge collection measurements with LHC speed electronics were employed to characterize the detectors. The thin LGAD sensors were shown to perform much better than sensors of standard thickness (~300 um) and offer larger charge collection with respect to detectors without gain layer for fluences <2e15 cm-2. Larger initial gain prolongs the beneficial performance of LGADs. Pions were found to be more damaging than neutrons at the same equivalent fluence, while no significant difference was found between different producers. At very high fluences and bias voltages the gain appears due to deep acceptors in the bulk, hence also in thin standard detectors.

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Prototyping of petalets for the Phase-II Upgrade of the silicon strip tracking detector of the ATLAS Experiment

In the high luminosity era of the Large Hadron Collider, the HL-LHC, the instantaneous luminosity is expected to reach unprecedented values, resulting in about 200 proton-proton interactions in a typical bunch crossing. To cope with the resultant increase in occupancy, bandwidth and radiation damage, the ATLAS Inner Detector will be replaced by an all-silicon system, the Inner Tracker (ITk). The ITk consists of a silicon pixel and a strip detector and exploits the concept of modularity. Prototyping and testing of various strip detector components has been carried out. This paper presents the developments and results obtained with reduced-size structures equivalent to those foreseen to be used in the forward region of the silicon strip detector. Referred to as petalets, these structures are built around a composite sandwich with embedded cooling pipes and electrical tapes for routing the signals and power. Detector modules built using electronic flex boards and silicon strip sensors are glued on both the front and back side surfaces of the carbon structure. Details are given on the assembly, testing and evaluation of several petalets. Measurement results of both mechanical and electrical quantities are shown. Moreover, an outlook is given for improved prototyping plans for large structures.

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Charge collection properties in an irradiated pixel sensor built in a thick-film HV-SOI process

Investigation of HV-CMOS sensors for use as a tracking detector in the ATLAS experiment at the upgraded LHC (HL-LHC) has recently been an active field of research. A potential candidate for a pixel detector built in Silicon-On-Insulator (SOI) technology has already been characterized in terms of radiation hardness to TID (Total Ionizing Dose) and charge collection after a moderate neutron irradiation. In this article we present results of an extensive irradiation hardness study with neutrons up to a fluence of 1x10e16 neq/cm2. Charge collection in a passive pixelated structure was measured by Edge Transient Current Technique (E-TCT). The evolution of the effective space charge concentration was found to be compliant with the acceptor removal model, with the minimum of the space charge concentration being reached after 5x10e14 neq/cm2. An investigation of the in-pixel uniformity of the detector response revealed parasitic charge collection by the epitaxial silicon layer characteristic for the SOI design. The results were backed by a numerical simulation of charge collection in an equivalent detector layout.

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Beam test results of a 16 ps timing system based on ultra-fast silicon detectors

In this paper we report on the timing resolution of the first production of 50 micro-meter thick Ultra-Fast Silicon Detectors (UFSD) as obtained in a beam test with pions of 180 GeV/c momentum. UFSD are based on the Low-Gain Avalanche Detectors (LGAD) design, employing n-on-p silicon sensors with internal charge multiplication due to the presence of a thin, low-resistivity diffusion layer below the junction. The UFSD used in this test belongs to the first production of thin (50 μm) sensors, with an pad area of 1.4 mm2. The gain was measured to vary between 5 and 70 depending on the bias voltage. The experimental setup included three UFSD and a fast trigger consisting of a quartz bar readout by a SiPM. The timing resolution, determined comparing the time of arrival of the particle in one or more UFSD and the trigger counter, for single UFSD was measured to be 35 ps for a bias voltage of 200 V, and 26 ps for a bias voltage of 240 V, and for the combination of 3 UFSD to be 20 ps for a bias voltage of 200 V, and 15 ps for a bias voltage of 240 V.

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