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Xueshen Wang

Publications and source records attributed to Xueshen Wang.

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Morphology-Guided Deterministic Fabrication of Low-Noise High-Temperature Superconducting Quantum Interference Devices

Reproducible bicrystal high-temperature superconducting quantum interference devices remain limited by local variability along the grain boundaries that form the Josephson junctions. Here, we develop a site-selective fabrication workflow in which atomic force microscopy maps the intended junction region before lithography, quantifies an apparent grain-boundary width, rejects pore-rich segments, and writes a nearby registration mark for site-specific pattern alignment. The apparent grain-boundary width provides a practical morphology metric, with narrower regions consistently yielding larger critical currents and characteristic voltages. Iterative optimization within this workflow further improves junction and device performance, reaching a liquid-nitrogen-temperature field-noise level of 40 fT Hz^(-1/2). This strategy turns local grain-boundary heterogeneity from an uncontrolled source of variability into a basis for site-selective fabrication, providing a route towards scalable manufacturing of low-noise HTS SQUIDs with high uniformity.

cond-mat.mes-hall

Demonstration of 3 V Programmable Josephson Junction Arrays Using Non-Integer-Multiple Logic

This article demonstrates a new kind of programmable logic for the representation of an integer that can be used for the programmable Josephson voltage standard. It can enable the numbers of junctions in most bits to be variable integer values, which is different from normal binary logic or ternary logic. Consequently, missing junctions due to superconducting short circuits can be tolerated under this logic. This logic can also have nearly the same segmentation efficiency as ternary logic. The completeness of the sequences using this logic is proven by the recursive method in mathematics in this paper. After that, a new algorithm for the representation of integers is presented according to the proven process, and an analysis of the number of fault-tolerant junctions for each bit is provided. Although the first and second bits are not tolerant to missing junctions, bits beyond these can tolerate one to hundreds of missing junctions. Due to the non-fixed multiples between the bits of the sequence, this logic is called non-integer-multiple logic. Finally, the design and fabrication of a 3 V programmable Josephson junction array using this logic are described, and the measurements and analysis of the characteristic parameters are presented.

cs.ET

In situ Qubit Frequency Tuning Circuit for Scalable Superconducting Quantum Computing: Scheme and Experiment

Frequency tunable qubit plays a significant role for scalable superconducting quantum processors. The state-of-the-art room-temperature electronics for tuning qubit frequency suffers from unscalable limit, such as heating problem, linear growth of control cables, etc. Here we propose a scalable scheme to tune the qubit frequency by using in situ superconducting circuit, which is based on radio frequency superconducting quantum interference device (rf-SQUID). We demonstrate both theoretically and experimentally that the qubit frequency could be modulated by inputting several single pulses into rf-SQUID. Compared with the traditional scheme, our scheme not only solves the heating problem, but also provides the potential to exponentially reduce the number of cables inside the dilute refrigerator and the room-temperature electronics resource for tuning qubit frequency, which is achieved by a time-division-multiplex (TDM) scheme combining rf-SQUID with switch arrays. With such TDM scheme, the number of cables could be reduced from the usual $\sim 3n$ to $\sim \log_2{(3n)} + 1$ for two-dimensional quantum processors comprising $n$ qubits and $\sim 2n$ couplers. Our work paves the way for large-scale control of superconducting quantum processor.

quant-ph